diff options
| author | Wangao Wang <wangao.wang@oss.qualcomm.com> | 2026-05-29 15:34:59 +0800 |
|---|---|---|
| committer | Bryan O'Donoghue <bod@kernel.org> | 2026-05-30 08:41:49 +0100 |
| commit | 4147ffa3d96dde43bd4f3607db75f261fafaade2 (patch) | |
| tree | 5965d7925c68c2035abad4cc24acb453b1d4a1b3 /drivers | |
| parent | d1c9f40f764ed2a91d2903c25d1962cf43afef89 (diff) | |
media: iris: Add hardware power on/off ops for X1P42100
On X1P42100 the Iris block has an extra BSE clock. Wire this clock into
the power on/off sequence.
The BSE clock is used to drive the Bin Stream Engine, which is a sub-block
of the video codec hardware responsible for bitstream-level processing. It
is required to be enabled separately from the core clock to ensure proper
codec operation.
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>
Signed-off-by: Wangao Wang <wangao.wang@oss.qualcomm.com>
Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/media/platform/qcom/iris/iris_vpu_common.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/media/platform/qcom/iris/iris_vpu_common.c b/drivers/media/platform/qcom/iris/iris_vpu_common.c index 3872c4f37987..5a85568c5ee1 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu_common.c +++ b/drivers/media/platform/qcom/iris/iris_vpu_common.c @@ -224,6 +224,7 @@ void iris_vpu_power_off_hw(struct iris_core *core) { dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN], false); iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN]); + iris_disable_unprepare_clock(core, IRIS_BSE_HW_CLK); iris_disable_unprepare_clock(core, IRIS_HW_AHB_CLK); iris_disable_unprepare_clock(core, IRIS_HW_CLK); } @@ -292,12 +293,18 @@ int iris_vpu_power_on_hw(struct iris_core *core) if (ret && ret != -ENOENT) goto err_disable_hw_clock; + ret = iris_prepare_enable_clock(core, IRIS_BSE_HW_CLK); + if (ret && ret != -ENOENT) + goto err_disable_hw_ahb_clock; + ret = dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN], true); if (ret) - goto err_disable_hw_ahb_clock; + goto err_disable_bse_hw_clock; return 0; +err_disable_bse_hw_clock: + iris_disable_unprepare_clock(core, IRIS_BSE_HW_CLK); err_disable_hw_ahb_clock: iris_disable_unprepare_clock(core, IRIS_HW_AHB_CLK); err_disable_hw_clock: |