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| author | Jon Hunter <jonathanh@nvidia.com> | 2026-03-25 19:25:59 +0000 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2026-03-28 01:02:39 +0100 |
| commit | db3c16b2b90b0f56a94f9780f9dd10b50b648860 (patch) | |
| tree | 0fc128f04393035aedc2a27d263327f4178ad83a /drivers/staging/bcm/git@git.tavy.me:linux.git | |
| parent | edded7a9033a77c9b8a66176daa5e0b601e7c474 (diff) | |
soc/tegra: pmc: Rename has_impl_33v_pwr flag
The flag 'has_impl_33v_pwr' is now only used to determine if we need to
set the write-enable bit before we can set the bit to select if 3.3V IO
is used or not. Therefore, rename the flag to 'has_io_pad_wren' to
indicate that the SoC supports the write-enable register.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/staging/bcm/git@git.tavy.me:linux.git')
0 files changed, 0 insertions, 0 deletions