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authorAnkit Soni <Ankit.Soni@amd.com>2026-04-13 14:45:21 +0000
committerJoerg Roedel <joerg.roedel@amd.com>2026-05-19 10:49:03 +0200
commit33730f06881640894d2b4228b04d4f3c7351f6c0 (patch)
tree14a53508e65b35d24b41dd76edaad962a0c0736e /drivers/phy/eswin/git@git.tavy.me:linux.git
parentd9f759704b546a46649f8c51d5e9b63e96afdbae (diff)
iommu/amd: Adhere to IVINFO[VASIZE] for address limits
ACPI IVRS IVHD’s IVINFO field reports the maximum virtual address size (VASIZE) supported by the IOMMU. The AMD IOMMU driver currently caps this with pagetable level reported by EFR[HATS] when configuring paging domains (hw_max_vasz_lg2). On systems where firmware or VM advertises smaller or different limits, the driver may over-advertise capabilities and create domains outside the hardware’s actual bounds. Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Reviewed-by: Vasant Hegde <vasant.hegde@amd.com> Signed-off-by: Ankit Soni <Ankit.Soni@amd.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Diffstat (limited to 'drivers/phy/eswin/git@git.tavy.me:linux.git')
0 files changed, 0 insertions, 0 deletions