diff options
| author | Peng Fan <peng.fan@nxp.com> | 2026-06-10 22:39:11 +0800 |
|---|---|---|
| committer | Ulf Hansson <ulfh@kernel.org> | 2026-07-08 17:11:50 +0200 |
| commit | 25e252bcf1593b420b12a7231d9dd64b885a2ae2 (patch) | |
| tree | 74f51313e3fc0ba279d461e3c922c84662b23d4b /drivers/gpu/nova-core/fsp/hal/git@git.tavy.me:linux.git | |
| parent | 72422525f641f68bed6ca3389d29ee3f41fdea33 (diff) | |
pmdomain: imx: Fix i.MX8MP VC8000E power up sequence
Per errata[1]:
ERR050531: VPU_NOC power down handshake may hang during VC8000E/VPUMIX
power up/down cycling.
Description: VC8000E reset de-assertion edge and AXI clock may have a
timing issue.
Workaround: Set bit2 (vc8000e_clk_en) of BLK_CLK_EN_CSR to 0 to gate off
both AXI clock and VC8000E clock sent to VC8000E and AXI clock sent to
VPU_NOC m_v_2 interface during VC8000E power up(VC8000E reset is
de-asserted by HW)
Add a bool variable is_errata_err050531 in
'struct imx8m_blk_ctrl_domain_data' to represent whether the workaround
is needed. If is_errata_err050531 is true, first clear the clk before
powering up gpc, then enable the clk after powering up gpc.
[1] https://www.nxp.com/webapp/Download?colCode=IMX8MP_1P33A
Fixes: a1a5f15f7f6cb ("soc: imx: imx8m-blk-ctrl: add i.MX8MP VPU blk ctrl")
Cc: stable@vger.kernel.org
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Ulf Hansson <ulfh@kernel.org>
Diffstat (limited to 'drivers/gpu/nova-core/fsp/hal/git@git.tavy.me:linux.git')
0 files changed, 0 insertions, 0 deletions
