diff options
| author | Timur Kristóf <timur.kristof@gmail.com> | 2026-05-19 12:21:18 +0200 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2026-05-27 10:47:10 -0400 |
| commit | 622f134d85099477cd79f15a450edef37057d15e (patch) | |
| tree | 2f4916cd642deafc7158aa9ec477af5a63613788 /drivers/gpu/drm/amd/include/dm_pp_interface.h | |
| parent | e624a56f8a4c8c5a7d0a3937e929056e807d9562 (diff) | |
drm/amd/pm: Delete PP_DAL_POWERLEVEL
Not used and not needed anymore.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Melissa Wen <mwen@igalia.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/include/dm_pp_interface.h')
| -rw-r--r-- | drivers/gpu/drm/amd/include/dm_pp_interface.h | 18 |
1 files changed, 0 insertions, 18 deletions
diff --git a/drivers/gpu/drm/amd/include/dm_pp_interface.h b/drivers/gpu/drm/amd/include/dm_pp_interface.h index 10747a1ceda9..e3d40fb37103 100644 --- a/drivers/gpu/drm/amd/include/dm_pp_interface.h +++ b/drivers/gpu/drm/amd/include/dm_pp_interface.h @@ -115,23 +115,6 @@ struct amd_pp_simple_clock_info { uint32_t memory_max_clock; }; -enum PP_DAL_POWERLEVEL { - PP_DAL_POWERLEVEL_INVALID = 0, - PP_DAL_POWERLEVEL_ULTRALOW, - PP_DAL_POWERLEVEL_LOW, - PP_DAL_POWERLEVEL_NOMINAL, - PP_DAL_POWERLEVEL_PERFORMANCE, - - PP_DAL_POWERLEVEL_0 = PP_DAL_POWERLEVEL_ULTRALOW, - PP_DAL_POWERLEVEL_1 = PP_DAL_POWERLEVEL_LOW, - PP_DAL_POWERLEVEL_2 = PP_DAL_POWERLEVEL_NOMINAL, - PP_DAL_POWERLEVEL_3 = PP_DAL_POWERLEVEL_PERFORMANCE, - PP_DAL_POWERLEVEL_4 = PP_DAL_POWERLEVEL_3+1, - PP_DAL_POWERLEVEL_5 = PP_DAL_POWERLEVEL_4+1, - PP_DAL_POWERLEVEL_6 = PP_DAL_POWERLEVEL_5+1, - PP_DAL_POWERLEVEL_7 = PP_DAL_POWERLEVEL_6+1, -}; - struct amd_pp_clock_info { uint32_t min_engine_clock; uint32_t max_engine_clock; @@ -141,7 +124,6 @@ struct amd_pp_clock_info { uint32_t max_bus_bandwidth; uint32_t max_engine_clock_in_sr; uint32_t min_engine_clock_in_sr; - enum PP_DAL_POWERLEVEL max_clocks_state; }; enum amd_pp_clock_type { |