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| author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2026-06-08 21:33:47 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2026-06-08 21:33:47 +0200 |
| commit | 745ffd4e7ba2f52072cf511f5643d3bc55b45980 (patch) | |
| tree | 0e447b5ae9e98372786839de2f7e2c3c56d2dfa1 /Documentation | |
| parent | 47b56cc367853f907c223bc32796c10bbdae259c (diff) | |
| parent | 94fe92d2f662b990da2ef9788bbe3bdcfe086731 (diff) | |
Merge tag 'icc-7.2-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next
Georgi writes:
This pull request contains the following interconnect updates for
the 7.2-rc1 merge window:
- New driver for Shikra SoC
- New driver for Nord SoC
- New driver for Hawi SoC including CPU/LLCC bwmon support
- Add missing SDCC nodes for Eliza SoC
- Misc cleanups and fixes.
Signed-off-by: Georgi Djakov <djakov@kernel.org>
* tag 'icc-7.2-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/djakov/icc:
interconnect: qcom: add Hawi interconnect provider driver
dt-bindings: interconnect: qcom: document the RPMh NoC for Hawi SoC
dt-bindings: interconnect: qcom-bwmon: Add Hawi llcc-bwmon compatible
interconnect: qcom: eliza: Add SDCC1 slave node
dt-bindings: interconnect: qcom,eliza-rpmh: Add SDCC1 slave
interconnect: qcom: Restrict drivers per ARM/ARM64
interconnect: qcom: Fix indentation
dt-bindings: interconnect: qcom,sm6115: Restrict children and clocks
dt-bindings: interconnect: qcom,sm6115: Drop incorrect children if:then: block
dt-bindings: interconnect: qcom,sdm660: Disallow clocks when appropriate
interconnect: Move MODULE_DEVICE_TABLE next to the table itself
interconnect: Do not create empty devres on missing interconnects
dt-bindings: interconnect: qcom-bwmon: Add Hawi cpu-bwmon compatible
interconnect: qcom: Add interconnect provider driver for Nord SoC
dt-bindings: interconnect: Document RPMh Network-On-Chip for Qualcomm Nord SoC
interconnect: qcom: add Shikra interconnect provider driver
dt-bindings: interconnect: document the RPM Network-On-Chip interconnect in Shikra SoC
Diffstat (limited to 'Documentation')
6 files changed, 426 insertions, 18 deletions
diff --git a/Documentation/devicetree/bindings/interconnect/qcom,hawi-rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,hawi-rpmh.yaml new file mode 100644 index 000000000000..49a2dca5db62 --- /dev/null +++ b/Documentation/devicetree/bindings/interconnect/qcom,hawi-rpmh.yaml @@ -0,0 +1,131 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interconnect/qcom,hawi-rpmh.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm RPMh Network-On-Chip Interconnect on Hawi + +maintainers: + - Vivek Aknurwar <vivek.aknurwar@oss.qualcomm.com> + +description: | + RPMh interconnect providers support system bandwidth requirements through + RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is + able to communicate with the BCM through the Resource State Coordinator (RSC) + associated with each execution environment. Provider nodes must point to at + least one RPMh device child node pertaining to their RSC and each provider + can map to multiple RPMh resources. + + See also: include/dt-bindings/interconnect/qcom,hawi-rpmh.h + +properties: + compatible: + enum: + - qcom,hawi-aggre1-noc + - qcom,hawi-clk-virt + - qcom,hawi-cnoc-main + - qcom,hawi-gem-noc + - qcom,hawi-llclpi-noc + - qcom,hawi-lpass-ag-noc + - qcom,hawi-lpass-lpiaon-noc + - qcom,hawi-lpass-lpicx-noc + - qcom,hawi-mc-virt + - qcom,hawi-mmss-noc + - qcom,hawi-nsp-noc + - qcom,hawi-pcie-anoc + - qcom,hawi-stdst-cfg + - qcom,hawi-stdst-main + - qcom,hawi-system-noc + + reg: + maxItems: 1 + + clocks: + minItems: 2 + maxItems: 3 + +required: + - compatible + +allOf: + - $ref: qcom,rpmh-common.yaml# + - if: + properties: + compatible: + contains: + enum: + - qcom,hawi-clk-virt + - qcom,hawi-mc-virt + then: + properties: + reg: false + else: + required: + - reg + + - if: + properties: + compatible: + contains: + enum: + - qcom,hawi-pcie-anoc + then: + properties: + clocks: + items: + - description: aggre-NOC PCIe AXI clock + - description: cfg-NOC PCIe a-NOC AHB clock + + - if: + properties: + compatible: + contains: + enum: + - qcom,hawi-aggre1-noc + then: + properties: + clocks: + items: + - description: aggre UFS PHY AXI clock + - description: aggre USB3 PRIM AXI clock + - description: RPMH CC IPA clock + + - if: + properties: + compatible: + contains: + enum: + - qcom,hawi-aggre1-noc + - qcom,hawi-pcie-anoc + then: + required: + - clocks + else: + properties: + clocks: false + +unevaluatedProperties: false + +examples: + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + + clk_virt: interconnect-0 { + compatible = "qcom,hawi-clk-virt"; + #interconnect-cells = <2>; + qcom,bcm-voters = <&apps_bcm_voter>; + }; + + aggre_noc: interconnect@f00000 { + compatible = "qcom,hawi-aggre1-noc"; + reg = <0x0 0xf00000 0x0 0x54400>; + #interconnect-cells = <2>; + clocks = <&gcc_aggre_ufs_phy_axi_clk>, + <&gcc_aggre_usb3_prim_axi_clk>, + <&rpmhcc_ipa_clk>; + qcom,bcm-voters = <&apps_bcm_voter>; + }; + }; diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml index ce79521bb1ef..ff64225e8281 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml @@ -26,6 +26,7 @@ properties: - items: - enum: - qcom,glymur-cpu-bwmon + - qcom,hawi-cpu-bwmon - qcom,kaanapali-cpu-bwmon - qcom,qcm2290-cpu-bwmon - qcom,qcs615-cpu-bwmon @@ -45,6 +46,7 @@ properties: - const: qcom,sdm845-bwmon # BWMON v4, unified register space - items: - enum: + - qcom,hawi-llcc-bwmon - qcom,qcs615-llcc-bwmon - qcom,qcs8300-llcc-bwmon - qcom,sa8775p-llcc-bwmon diff --git a/Documentation/devicetree/bindings/interconnect/qcom,nord-rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,nord-rpmh.yaml new file mode 100644 index 000000000000..3650d3d5b918 --- /dev/null +++ b/Documentation/devicetree/bindings/interconnect/qcom,nord-rpmh.yaml @@ -0,0 +1,131 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interconnect/qcom,nord-rpmh.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm RPMh Network-On-Chip Interconnect on Nord + +maintainers: + - Odelu Kukatla <odelu.kukatla@oss.qualcomm.com> + +description: | + RPMh interconnect providers support system bandwidth requirements through + RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is + able to communicate with the BCM through the Resource State Coordinator (RSC) + associated with each execution environment. Provider nodes must point to at + least one RPMh device child node pertaining to their RSC and each provider + can map to multiple RPMh resources. + + See also: include/dt-bindings/interconnect/qcom,nord-rpmh.h + +properties: + compatible: + enum: + - qcom,nord-aggre1-noc + - qcom,nord-aggre1-noc-tile + - qcom,nord-aggre2-noc + - qcom,nord-aggre2-noc-tile + - qcom,nord-clk-virt + - qcom,nord-cnoc-cfg + - qcom,nord-cnoc-main + - qcom,nord-hpass-ag-noc + - qcom,nord-hscnoc + - qcom,nord-mc-virt + - qcom,nord-mmss-noc + - qcom,nord-nsp-data-noc-0 + - qcom,nord-nsp-data-noc-1 + - qcom,nord-nsp-data-noc-2 + - qcom,nord-nsp-data-noc-3 + - qcom,nord-pcie-cfg + - qcom,nord-pcie-data-inbound + - qcom,nord-pcie-data-outbound + - qcom,nord-system-noc + + reg: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 4 + +required: + - compatible + +allOf: + - $ref: qcom,rpmh-common.yaml# + - if: + properties: + compatible: + contains: + enum: + - qcom,nord-clk-virt + - qcom,nord-mc-virt + then: + properties: + reg: false + else: + required: + - reg + + - if: + properties: + compatible: + contains: + enum: + - qcom,nord-aggre1-noc-tile + then: + properties: + clocks: + items: + - description: aggre UFS PHY AXI clock + - description: aggre USB2 AXI clock + - description: aggre USB3 PRIM AXI clock + - description: aggre USB3 SEC AXI clock + + - if: + properties: + compatible: + contains: + enum: + - qcom,nord-aggre2-noc + then: + properties: + clocks: + items: + - description: RPMH CC IPA clock + + - if: + properties: + compatible: + contains: + enum: + - qcom,nord-aggre1-noc-tile + - qcom,nord-aggre2-noc + then: + required: + - clocks + else: + properties: + clocks: false + +unevaluatedProperties: false + +examples: + - | + clk_virt: interconnect-clk-virt { + compatible = "qcom,nord-clk-virt"; + #interconnect-cells = <2>; + qcom,bcm-voters = <&apps_bcm_voter>; + }; + + aggre1_noc_tile: interconnect@1720000 { + compatible = "qcom,nord-aggre1-noc-tile"; + reg = <0x01720000 0x23400>; + #interconnect-cells = <2>; + qcom,bcm-voters = <&apps_bcm_voter>; + clocks = <&ne_gcc_aggre_noc_ufs_phy_axi_clk>, + <&ne_gcc_aggre_noc_usb2_axi_clk>, + <&ne_gcc_aggre_noc_usb3_prim_axi_clk>, + <&ne_gcc_aggre_noc_usb3_sec_axi_clk>; + }; diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sdm660.yaml b/Documentation/devicetree/bindings/interconnect/qcom,sdm660.yaml index 8f6bc6399626..51428a2b0ce0 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,sdm660.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,sdm660.yaml @@ -79,6 +79,19 @@ allOf: - const: aggre2_usb3_axi - const: cfg_noc_usb2_axi + - if: + properties: + compatible: + enum: + - qcom,sdm660-bimc + - qcom,sdm660-cnoc + - qcom,sdm660-gnoc + - qcom,sdm660-snoc + then: + properties: + clocks: false + clock-names: false + examples: - | #include <dt-bindings/clock/qcom,gcc-sdm660.h> diff --git a/Documentation/devicetree/bindings/interconnect/qcom,shikra.yaml b/Documentation/devicetree/bindings/interconnect/qcom,shikra.yaml new file mode 100644 index 000000000000..a0c26de94ccf --- /dev/null +++ b/Documentation/devicetree/bindings/interconnect/qcom,shikra.yaml @@ -0,0 +1,134 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interconnect/qcom,shikra.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Shikra Network-On-Chip interconnect + +maintainers: + - Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com> + +description: + The Qualcomm Shikra interconnect providers support adjusting the + bandwidth requirements between the various NoC fabrics. + +properties: + compatible: + enum: + - qcom,shikra-config-noc + - qcom,shikra-mem-noc-core + - qcom,shikra-sys-noc + + reg: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 4 + + clock-names: + minItems: 1 + maxItems: 4 + +# Child node's properties +patternProperties: + '^interconnect-[a-z0-9]+$': + type: object + description: + The interconnect providers do not have a separate QoS register space, + but share parent's space. + + $ref: qcom,rpm-common.yaml# + + properties: + compatible: + enum: + - qcom,shikra-clk-virt + - qcom,shikra-mc-virt + - qcom,shikra-mmrt-virt + - qcom,shikra-mmnrt-virt + + required: + - compatible + + unevaluatedProperties: false + +required: + - compatible + - reg + +allOf: + - $ref: qcom,rpm-common.yaml# + - if: + properties: + compatible: + const: qcom,shikra-mem-noc-core + + then: + properties: + clocks: + items: + - description: GPU-NoC AXI clock + + clock-names: + items: + - const: gpu_axi + patternProperties: + '^interconnect-[a-z0-9]+$': false + + - if: + properties: + compatible: + const: qcom,shikra-sys-noc + + then: + properties: + clocks: + items: + - description: EMAC0-NoC AXI clock. + - description: EMAC1-NoC AXI clock. + - description: USB2-NoC AXI clock. + - description: USB3-NoC AXI clock. + + clock-names: + items: + - const: emac0_axi + - const: emac1_axi + - const: usb2_axi + - const: usb3_axi + + - if: + properties: + compatible: + const: qcom,shikra-config-noc + + then: + properties: + clocks: false + clock-names: false + patternProperties: + '^interconnect-[a-z0-9]+$': false + +unevaluatedProperties: false + +examples: + - | + interconnect@1880000 { + compatible = "qcom,shikra-sys-noc"; + reg = <0x01880000 0x6a080>; + #interconnect-cells = <2>; + clocks = <&gcc_emac0_axi_sys_noc_clk>, + <&gcc_emac1_axi_sys_noc_clk>, + <&gcc_sys_noc_usb2_prim_axi_clk>, + <&gcc_sys_noc_usb3_prim_axi_clk>; + clock-names = "emac0_axi", + "emac1_axi", + "usb2_axi", + "usb3_axi"; + + interconnect-clk { + compatible = "qcom,shikra-clk-virt"; + #interconnect-cells = <2>; + }; + }; diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sm6115.yaml b/Documentation/devicetree/bindings/interconnect/qcom,sm6115.yaml index 14b1a0b08e73..cdae0acf3a1d 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,sm6115.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,sm6115.yaml @@ -62,23 +62,33 @@ allOf: - if: properties: compatible: - const: qcom,sm6115-cnoc + const: qcom,sm6115-bimc + then: + properties: + clocks: false + clock-names: false + patternProperties: + '^interconnect-[a-z0-9]+$': false + - if: + properties: + compatible: + const: qcom,sm6115-cnoc then: properties: clocks: items: - description: USB-NoC AXI clock - clock-names: items: - const: usb_axi + patternProperties: + '^interconnect-[a-z0-9]+$': false - if: properties: compatible: const: qcom,sm6115-snoc - then: properties: clocks: @@ -87,7 +97,6 @@ allOf: - description: UFS-NoC AXI clock. - description: USB-NoC AXI clock. - description: IPA clock. - clock-names: items: - const: cpu_axi @@ -95,20 +104,6 @@ allOf: - const: usb_axi - const: ipa - - if: - properties: - compatible: - enum: - - qcom,sm6115-bimc - - qcom,sm6115-clk-virt - - qcom,sm6115-mmrt-virt - - qcom,sm6115-mmnrt-virt - - then: - properties: - clocks: false - clock-names: false - unevaluatedProperties: false examples: @@ -149,4 +144,6 @@ examples: compatible = "qcom,sm6115-cnoc"; reg = <0x01900000 0x8200>; #interconnect-cells = <1>; + clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>; + clock-names = "usb_axi"; }; |
