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| author | Hou Wenlong <houwenlong.hwl@antgroup.com> | 2026-05-15 15:26:38 -0700 |
|---|---|---|
| committer | Sean Christopherson <seanjc@google.com> | 2026-05-21 14:40:25 -0700 |
| commit | b8284279b7325503739b5e0e86c9f08caaeeccf4 (patch) | |
| tree | f9431ba2e76ecffdcc3e745e3ef7b43701cd76de /Documentation/gpu/intel-display/git@git.tavy.me:linux.git | |
| parent | 063a22451fd9541b43fcb862a8ecdf104fa2ebe7 (diff) | |
KVM: selftests: Verify VMX's GUEST_PENDING_DBG_EXCEPTIONS.BS Consistency Check
In x86's debug_regs test, add a test case to cover the scenario where a
single-step #DB occurs in an STI-shadow, in which case KVM needs to stuff
vmcs.GUEST_PENDING_DBG_EXCEPTIONS.BS in order to satisfy a flawed VM-Entry
Consistency Check.
Wire up an IRQ handler to gain a bit of bonus coverage, as the subsequent
IRET from the #DB sets RFLAGS.IF, but *without* STI-blocking, and so the
pending IRQ is expected on the instruction immediately following STI.
Signed-off-by: Hou Wenlong <houwenlong.hwl@antgroup.com>
[sean: expect the IRQ on the CLI, and explain why]
Link: https://patch.msgid.link/20260515222638.1949982-11-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
Diffstat (limited to 'Documentation/gpu/intel-display/git@git.tavy.me:linux.git')
0 files changed, 0 insertions, 0 deletions