diff options
| author | Srinivas Pandruvada <srinivas.pandruvada@intel.com> | 2026-05-28 13:45:21 -0700 |
|---|---|---|
| committer | Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> | 2026-06-10 16:17:17 +0300 |
| commit | 2565a28cdcdcb035e151d285efcba26bccb3726e (patch) | |
| tree | 83958681f0d28f591fdeadacf61fab30a27d73d8 /Documentation/gpu/intel-display/git@git.tavy.me:linux.git | |
| parent | 6b63520ed14b17bbe9c2103debbd2152dde1fba3 (diff) | |
platform/x86: ISST: Restore SST-PP control to all domains
The SST-PP control offset is only restored to power domain 0 after
resume. During suspend, control values are read and stored for all
power domains.
Use pd_info->sst_base instead of power_domain_info->sst_base, which
only points to power domain 0 base address.
Fixes: dc7901b5a156 ("platform/x86: ISST: Store and restore all domains data")
Reported-by: Yi Lai <yi1.lai@intel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@intel.com>
Cc: stable@vger.kernel.org
Link: https://patch.msgid.link/20260528204521.3531456-1-srinivas.pandruvada@linux.intel.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Diffstat (limited to 'Documentation/gpu/intel-display/git@git.tavy.me:linux.git')
0 files changed, 0 insertions, 0 deletions