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authorAlex Hung <alex.hung@amd.com>2026-05-28 11:48:11 -0600
committerAlex Deucher <alexander.deucher@amd.com>2026-06-17 16:10:09 -0400
commite561531f2fca3ff4346b791dcbf7801aa1e172e8 (patch)
tree0219b109cba3a34a3304cce7c281c64473cbfc48
parent1c37d1b6c74116f2e6adcb675426eb36e60ae4d1 (diff)
drm/amd/display: Fix incorrect logic in CRC source handling
[WHAT] Fix three issues amdgpu_dm_crc.c: - Use cur_crc_src instead of source when deciding whether to call drm_dp_stop_crc() in the disable path of set_crc_source(). When disabling CRC, source is always NONE so dm_is_crc_source_dprx(source) was always false, meaning drm_dp_stop_crc() was never called when stopping a DPRX CRC source. Use cur_crc_src to check what was previously active instead. - Replace fragile 'source < 0' comparisons in verify_crc_source() and set_crc_source() with AMDGPU_DM_PIPE_CRC_SOURCE_INVALID. and avoiding signed/unsigned enum comparison concerns. - Remove redundant NULL initializations for drm_dev and acrtc in handle_crc_irq(). Both variables are unconditionally assigned right after. Assisted-by: Copilot:Claude-Sonnet-4.6 Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c
index 88f7cfea5624..daf50ec6bc80 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c
@@ -496,7 +496,7 @@ amdgpu_dm_crtc_verify_crc_source(struct drm_crtc *crtc, const char *src_name,
{
enum amdgpu_dm_pipe_crc_source source = dm_parse_crc_source(src_name);
- if (source < 0) {
+ if (source == AMDGPU_DM_PIPE_CRC_SOURCE_INVALID) {
DRM_DEBUG_DRIVER("Unknown CRC source %s for CRTC%d\n",
src_name, crtc->index);
return -EINVAL;
@@ -595,7 +595,7 @@ int amdgpu_dm_crtc_set_crc_source(struct drm_crtc *crtc, const char *src_name)
bool enabled = false;
int ret = 0;
- if (source < 0) {
+ if (source == AMDGPU_DM_PIPE_CRC_SOURCE_INVALID) {
DRM_DEBUG_DRIVER("Unknown CRC source %s for CRTC%d\n",
src_name, crtc->index);
return -EINVAL;
@@ -724,7 +724,7 @@ int amdgpu_dm_crtc_set_crc_source(struct drm_crtc *crtc, const char *src_name)
}
} else if (enabled && !enable) {
drm_crtc_vblank_put(crtc);
- if (dm_is_crc_source_dprx(source)) {
+ if (dm_is_crc_source_dprx(cur_crc_src)) {
if (drm_dp_stop_crc(aux)) {
DRM_DEBUG_DRIVER("dp stop crc failed\n");
ret = -EINVAL;
@@ -767,9 +767,9 @@ void amdgpu_dm_crtc_handle_crc_irq(struct drm_crtc *crtc)
{
struct dm_crtc_state *crtc_state;
struct dc_stream_state *stream_state;
- struct drm_device *drm_dev = NULL;
+ struct drm_device *drm_dev;
enum amdgpu_dm_pipe_crc_source cur_crc_src;
- struct amdgpu_crtc *acrtc = NULL;
+ struct amdgpu_crtc *acrtc;
uint32_t crcs[3];
unsigned long flags;