diff options
| author | Jia Wang <wangjia@ultrarisc.com> | 2026-06-10 13:29:55 +0800 |
|---|---|---|
| committer | Linus Walleij <linusw@kernel.org> | 2026-06-11 15:02:26 +0200 |
| commit | dac30db978c71af999403f42e4fad68eda5ed09e (patch) | |
| tree | 27a834bdc70a3d92676b7b68b1242d15eea65395 | |
| parent | 40fcc5ac4ceec6a0b0c90e8eb0f4c210ea9d39b4 (diff) | |
dt-bindings: pinctrl: Add UltraRISC DP1000 pinctrl controller
Add doc for the pinctrl controllers on the UltraRISC DP1000 RISC-V SoC.
Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>
| -rw-r--r-- | Documentation/devicetree/bindings/pinctrl/ultrarisc,dp1000-pinctrl.yaml | 130 | ||||
| -rw-r--r-- | MAINTAINERS | 6 |
2 files changed, 136 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/ultrarisc,dp1000-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ultrarisc,dp1000-pinctrl.yaml new file mode 100644 index 000000000000..c2332e6e60c2 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/ultrarisc,dp1000-pinctrl.yaml @@ -0,0 +1,130 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/ultrarisc,dp1000-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: UltraRISC DP1000 Pin Controller + +maintainers: + - Jia Wang <wangjia@ultrarisc.com> + +description: | + UltraRISC RISC-V SoC DP1000 pin controller. + The controller manages ports A, B, C, D and LPC. Ports A-D default to + GPIO and provide additional SPI, UART, I2C, and PWM mux functions. + LPC pins default to the LPC interface and can be muxed to eSPI. + All pins also support pin configuration, including drive strength, + pull-up, and pull-down settings. + +properties: + compatible: + const: ultrarisc,dp1000-pinctrl + + reg: + items: + - description: pin controller registers + +required: + - compatible + - reg + +patternProperties: + '.*-pins$': + type: object + unevaluatedProperties: false + allOf: + - $ref: /schemas/pinctrl/pincfg-node.yaml# + - $ref: /schemas/pinctrl/pinmux-node.yaml# + - if: + properties: + pins: + items: + minimum: 40 + maximum: 52 + then: + properties: + function: + enum: + - lpc + - espi + else: + properties: + pins: + items: + maximum: 39 + function: + enum: + - gpio + - i2c + - pwm + - spi + - uart + + properties: + pins: + description: | + List of pins affected by this state node, using numeric pin IDs. + Pins 0-39 correspond to ports A-D, and pins 40-52 correspond + to LPC0-LPC12. + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + uniqueItems: true + items: + minimum: 0 + maximum: 52 + + function: + description: | + Mux function to select for the listed pins. Supported functions + depend on the selected pins and match the DP1000 hardware mux + table. + enum: + - gpio + - i2c + - pwm + - spi + - uart + - lpc + - espi + + bias-disable: true + bias-high-impedance: true + bias-pull-up: true + bias-pull-down: true + + drive-strength: + description: Output drive strength in mA. + enum: [20, 27, 33, 40] + + required: + - pins + - function + +unevaluatedProperties: false + +examples: + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + + pinctrl@11081000 { + compatible = "ultrarisc,dp1000-pinctrl"; + reg = <0x0 0x11081000 0x0 0x1000>; + + i2c0-pins { + pins = <12 13>; + function = "i2c"; + bias-pull-up; + drive-strength = <33>; + }; + + uart0-pins { + pins = <8 9>; + function = "uart"; + bias-pull-up; + drive-strength = <33>; + }; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 12aae45a302c..fe5c274f6947 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -27313,6 +27313,12 @@ S: Maintained F: drivers/usb/common/ulpi.c F: include/linux/ulpi/ +ULTRARISC DP1000 PINCTRL DRIVER +M: Jia Wang <wangjia@ultrarisc.com> +L: linux-gpio@vger.kernel.org +S: Maintained +F: Documentation/devicetree/bindings/pinctrl/ultrarisc,dp1000-pinctrl.yaml + ULTRATRONIK BOARD SUPPORT M: Goran Rađenović <goran.radni@gmail.com> M: Börge Strümpfel <boerge.struempfel@gmail.com> |
