diff options
| author | Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com> | 2026-06-16 21:51:52 +0530 |
|---|---|---|
| committer | Animesh Manna <animesh.manna@intel.com> | 2026-06-17 18:18:38 +0530 |
| commit | c90ff0493d154db99dffae5e4d696fd19ac20fc4 (patch) | |
| tree | ae26350589c86835d7de3912bd0c17459a268eea | |
| parent | 3f0f34860689bb8ef0adea2a708b4936fd27d114 (diff) | |
drm/i915/display: Add DC3CO count and residency in dmc debugfs
Expose DC3CO count and residency for xe3lp platforms via debugfs.
Changes in v2:
- Keep dc5_reg register initialization to avoid any
invalid access (sashiko)
Changes in v3:
- Change XE3P_DMC_DC3CO_COUNT address to lower case (Manna Animesh).
Signed-off-by: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Link: https://patch.msgid.link/20260616162154.2630995-15-dibin.moolakadan.subrahmanian@intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dmc.c | 9 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dmc_regs.h | 2 |
2 files changed, 10 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c index 23e4e87576cb..11f5dbf91e68 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc.c +++ b/drivers/gpu/drm/i915/display/intel_dmc.c @@ -1649,7 +1649,14 @@ static int intel_dmc_debugfs_status_show(struct seq_file *m, void *unused) DMC_VERSION_MINOR(dmc->version)); if (DISPLAY_VER(display) >= 12) { - if (display->platform.dgfx || DISPLAY_VER(display) >= 14) { + if (DISPLAY_VER(display) >= 35) { + dc5_reg = DG1_DMC_DEBUG_DC5_COUNT; + seq_printf(m, "DC3CO count: %d\n", + intel_de_read(display, XE3P_DMC_DC3CO_COUNT)); + + seq_printf(m, "DC3CO residency: %d\n", + intel_de_read(display, DC_STATE_DC3CO_RESIDENCY)); + } else if (display->platform.dgfx || DISPLAY_VER(display) >= 14) { dc5_reg = DG1_DMC_DEBUG_DC5_COUNT; } else { dc5_reg = TGL_DMC_DEBUG_DC5_COUNT; diff --git a/drivers/gpu/drm/i915/display/intel_dmc_regs.h b/drivers/gpu/drm/i915/display/intel_dmc_regs.h index 38e342b45af0..6b7978fb8986 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc_regs.h +++ b/drivers/gpu/drm/i915/display/intel_dmc_regs.h @@ -531,6 +531,8 @@ enum pipedmc_event_id { #define TGL_DMC_DEBUG3 _MMIO(0x101090) #define DG1_DMC_DEBUG3 _MMIO(0x13415c) +#define XE3P_DMC_DC3CO_COUNT _MMIO(0x8f05c) + #define DMC_WAKELOCK_CFG _MMIO(0x8F1B0) #define DMC_WAKELOCK_CFG_ENABLE REG_BIT(31) #define DMC_WAKELOCK1_CTL _MMIO(0x8F140) |