diff options
| author | Guoniu Zhou <guoniu.zhou@oss.nxp.com> | 2026-05-19 10:07:43 +0800 |
|---|---|---|
| committer | Sakari Ailus <sakari.ailus@linux.intel.com> | 2026-05-20 14:28:37 +0300 |
| commit | af92c6d86b2bc3849935dc6ecfe78eba016a47a4 (patch) | |
| tree | 2cc1fe68c7fece8bc7aedcd17010c0e70dcb94ce | |
| parent | 113423645c9363acdb03859c65b5b030ae9ddd43 (diff) | |
media: synopsys: Add support for i.MX95
Add support for the i.MX95 MIPI CSI-2 receiver. The i.MX95 variant is
nearly identical to i.MX93, with the main difference being the use of
IDI (Image Data Interface) instead of IPI (Image Pixel Interface).
However, the IDI interface is transparent to software, requiring only
a different register map definition while sharing the same PHY control
functions with i.MX93.
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Guoniu Zhou <guoniu.zhou@oss.nxp.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
| -rw-r--r-- | drivers/media/platform/synopsys/dw-mipi-csi2rx.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/drivers/media/platform/synopsys/dw-mipi-csi2rx.c b/drivers/media/platform/synopsys/dw-mipi-csi2rx.c index 8a34aec550ad..41e48365167e 100644 --- a/drivers/media/platform/synopsys/dw-mipi-csi2rx.c +++ b/drivers/media/platform/synopsys/dw-mipi-csi2rx.c @@ -154,6 +154,17 @@ static const u32 imx93_regs[DW_MIPI_CSI2RX_MAX] = { [DW_MIPI_CSI2RX_IPI_SOFTRSTN] = DW_REG(0xa0), }; +static const u32 imx95_regs[DW_MIPI_CSI2RX_MAX] = { + [DW_MIPI_CSI2RX_N_LANES] = DW_REG(0x4), + [DW_MIPI_CSI2RX_RESETN] = DW_REG(0x8), + [DW_MIPI_CSI2RX_PHY_SHUTDOWNZ] = DW_REG(0x40), + [DW_MIPI_CSI2RX_DPHY_RSTZ] = DW_REG(0x44), + [DW_MIPI_CSI2RX_PHY_STATE] = DW_REG(0x48), + [DW_MIPI_CSI2RX_PHY_STOPSTATE] = DW_REG(0x4c), + [DW_MIPI_CSI2RX_PHY_TST_CTRL0] = DW_REG(0x50), + [DW_MIPI_CSI2RX_PHY_TST_CTRL1] = DW_REG(0x54), +}; + static const struct v4l2_mbus_framefmt default_format = { .width = 3840, .height = 2160, @@ -914,12 +925,23 @@ static const struct dw_mipi_csi2rx_drvdata imx93_drvdata = { .wait_for_phy_stopstate = imx93_csi2rx_wait_for_phy_stopstate, }; +static const struct dw_mipi_csi2rx_drvdata imx95_drvdata = { + .regs = imx95_regs, + .dphy_assert_reset = imx93_csi2rx_dphy_assert_reset, + .dphy_deassert_reset = imx93_csi2rx_dphy_deassert_reset, + .wait_for_phy_stopstate = imx93_csi2rx_wait_for_phy_stopstate, +}; + static const struct of_device_id dw_mipi_csi2rx_of_match[] = { { .compatible = "fsl,imx93-mipi-csi2", .data = &imx93_drvdata, }, { + .compatible = "fsl,imx95-mipi-csi2", + .data = &imx95_drvdata, + }, + { .compatible = "rockchip,rk3568-mipi-csi2", .data = &rk3568_drvdata, }, |