diff options
| author | Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> | 2026-07-22 07:54:46 +0200 |
|---|---|---|
| committer | Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> | 2026-07-30 07:19:51 +0200 |
| commit | 9656bcd4c321a799148d00dd830ce7ebf20011da (patch) | |
| tree | 1f2ee277dd6be9181275367a6c399bf032f0163a | |
| parent | 5993e10b82a4bc5b034870dae788a7eb5ce62e93 (diff) | |
PCI: epf-mhi: Implement mhi_cntrl->flush_async() to flush DMA read/write
The MHI core needs to make sure that all the current DMA transactions are
completed before removing the channels. So implement the
mhi_cntrl->flush_async() callback by first making sure all the in-flight
DMA operations are completed and then flushing the DMA workqueue.
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
| -rw-r--r-- | drivers/pci/endpoint/functions/pci-epf-mhi.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/endpoint/functions/pci-epf-mhi.c index 7f5326925ed5..8d2d9d01cfd2 100644 --- a/drivers/pci/endpoint/functions/pci-epf-mhi.c +++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c @@ -644,6 +644,15 @@ err_unlock: return ret; } +static void pci_epf_mhi_edma_flush_async(struct mhi_ep_cntrl *mhi_cntrl) +{ + struct pci_epf_mhi *epf_mhi = to_epf_mhi(mhi_cntrl); + + dmaengine_synchronize(epf_mhi->dma_chan_rx); + dmaengine_synchronize(epf_mhi->dma_chan_tx); + flush_workqueue(epf_mhi->dma_wq); +} + struct epf_dma_filter { struct device *dev; u32 dma_mask; @@ -812,6 +821,7 @@ static int pci_epf_mhi_link_up(struct pci_epf *epf) mhi_cntrl->write_sync = pci_epf_mhi_edma_write; mhi_cntrl->read_async = pci_epf_mhi_edma_read_async; mhi_cntrl->write_async = pci_epf_mhi_edma_write_async; + mhi_cntrl->flush_async = pci_epf_mhi_edma_flush_async; } /* Register the MHI EP controller */ |