diff options
| author | Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> | 2026-07-13 16:05:31 +0300 |
|---|---|---|
| committer | Alexandre Belloni <alexandre.belloni@bootlin.com> | 2026-07-31 09:28:13 +0200 |
| commit | 7b15ca2615ec41fb428eb9af71bf3ebc95021201 (patch) | |
| tree | 8afdeccca8050a1486f6a5ae811e85028b5146bb | |
| parent | 21cded44e69c630799e65baadb72ad123d1347c8 (diff) | |
i3c: renesas: Follow the reset deassert order used in probe
Use the same reset deassert order in the resume and probe paths to avoid
potential failures due to ordering differences.
Fixes: e7218986319b ("i3c: renesas: Add suspend/resume support")
Cc: stable@vger.kernel.org
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Tested-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Link: https://patch.msgid.link/20260713130545.568657-4-claudiu.beznea+renesas@tuxon.dev
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
| -rw-r--r-- | drivers/i3c/master/renesas-i3c.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-i3c.c index acfc38b18896..45de42c40fbb 100644 --- a/drivers/i3c/master/renesas-i3c.c +++ b/drivers/i3c/master/renesas-i3c.c @@ -1463,17 +1463,17 @@ static int renesas_i3c_resume_noirq(struct device *dev) struct renesas_i3c *i3c = dev_get_drvdata(dev); int i, ret; - ret = reset_control_deassert(i3c->presetn); + ret = reset_control_deassert(i3c->tresetn); if (ret) return ret; - ret = reset_control_deassert(i3c->tresetn); + ret = reset_control_deassert(i3c->presetn); if (ret) - goto err_presetn; + goto err_tresetn; ret = clk_bulk_enable(i3c->num_clks, i3c->clks); if (ret) - goto err_tresetn; + goto err_presetn; /* Re-store I3C registers value. */ renesas_writel(i3c->regs, STDBR, i3c->i3c_STDBR); @@ -1494,10 +1494,10 @@ static int renesas_i3c_resume_noirq(struct device *dev) return 0; -err_tresetn: - reset_control_assert(i3c->tresetn); err_presetn: reset_control_assert(i3c->presetn); +err_tresetn: + reset_control_assert(i3c->tresetn); return ret; } |