summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorJai Luthra <jai.luthra@ideasonboard.com>2026-06-02 18:29:28 +0530
committerVignesh Raghavendra <vigneshr@ti.com>2026-08-03 15:28:00 +0530
commit7859b66bfaac20198805fa6d69f477888e14a09e (patch)
tree7b6548dc753f13153a3ff54dbb4339e685f2debd
parentf0d750aa4072d8e06a3133a852d48149d02cdd49 (diff)
arm64: dts: ti: k3-am67a-beagley-ai: Add DSI0/CSI1 mux
The DSI0 connector is shared with the CSI1 and selectable via the TMUX646 switch present on the board. Model it using a gpio-mux so that camera sensor or DSI panel overlays can override it. Link: https://docs.beagle.cc/boards/beagley/ai/03-design.html#dsi Reviewed-by: Rishikesh Donadkar <r-donadkar@ti.com> Signed-off-by: Jai Luthra <jai.luthra@ideasonboard.com> Link: https://patch.msgid.link/20260602-beagley-cameras-v3-2-fe6ae35b7eda@ideasonboard.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
-rw-r--r--arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts20
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts b/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts
index 890d3a745375..bb1db8c6a91f 100644
--- a/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts
+++ b/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts
@@ -146,6 +146,19 @@
default-state = "on";
};
};
+
+ dsi_csi_mux: mux-controller {
+ compatible = "gpio-mux";
+ #mux-state-cells = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&dsi_csi_mux_pins_default>;
+
+ mux-gpios = <&main_gpio0 2 GPIO_ACTIVE_HIGH>,
+ <&main_gpio0 1 GPIO_ACTIVE_HIGH>;
+
+ /* state = SEL + 2*OE : 0 = DSI0, 1 = CSI1, 2,3 = off */
+ idle-state = <2>;
+ };
};
&main_pmx0 {
@@ -199,6 +212,13 @@
>;
};
+ dsi_csi_mux_pins_default: dsi-csi-mux-default-pins {
+ pinctrl-single,pins = <
+ J722S_IOPAD(0x0004, PIN_OUTPUT, 7) /* (L23) OSPI0_LBCLKO.GPIO0_1 */
+ J722S_IOPAD(0x0008, PIN_OUTPUT, 7) /* (L22) OSPI0_DQS.GPIO0_2 */
+ >;
+ };
+
rgmii1_pins_default: rgmii1-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x014c, PIN_INPUT, 0) /* (AC25) RGMII1_RD0 */