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authorMartin Tůma <martin.tuma@digiteqautomotive.com>2026-01-27 13:43:08 +0100
committerHans Verkuil <hverkuil+cisco@kernel.org>2026-03-16 11:51:55 +0100
commit6cc2b8d987477c5dce5eee4d78b226c981386fbb (patch)
tree89d4a229f96c7406d007edc663d6c81bf8960148
parentb4318729a0df38a07be2348d8b91db40dc9f1cf3 (diff)
media:admin-guide:mgb4: Add zDML color mapping info
Document the zDML (Audi Digital Matrix Light) color mapping option for the inputs and the new outputs color mapping property. Signed-off-by: Martin Tůma <martin.tuma@digiteqautomotive.com> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
-rw-r--r--Documentation/admin-guide/media/mgb4.rst8
1 files changed, 8 insertions, 0 deletions
diff --git a/Documentation/admin-guide/media/mgb4.rst b/Documentation/admin-guide/media/mgb4.rst
index 0a8a56e837f7..8e429fd77712 100644
--- a/Documentation/admin-guide/media/mgb4.rst
+++ b/Documentation/admin-guide/media/mgb4.rst
@@ -74,6 +74,7 @@ Common FPDL3/GMSL input parameters
| 0 - OLDI/JEIDA
| 1 - SPWG/VESA (default)
+ | 2 - ZDML
**link_status** (R):
Video link status. If the link is locked, chips are properly connected and
@@ -240,6 +241,13 @@ Common FPDL3/GMSL output parameters
*Note: This parameter can not be changed while the output v4l2 device is
open.*
+**color_mapping** (RW):
+ Mapping of the outgoing bits in the signal to the colour bits of the pixels.
+
+ | 0 - OLDI/JEIDA
+ | 1 - SPWG/VESA (default)
+ | 2 - ZDML
+
**frame_rate** (RW):
Output video signal frame rate limit in frames per second. Due to
the limited output pixel clock steps, the card can not always generate