diff options
| author | Miquel Raynal <miquel.raynal@bootlin.com> | 2026-05-26 16:56:47 +0200 |
|---|---|---|
| committer | Pratyush Yadav <pratyush@kernel.org> | 2026-05-27 14:36:02 +0200 |
| commit | 591be2ba7861be3ca3aabeb3fd2a3ce96ddb8601 (patch) | |
| tree | d38b23468460c8901c06f51c89682aa7ef08823e | |
| parent | f5d81415a7e12cc73b510bfac181411fedfe6345 (diff) | |
mtd: spi-nor: winbond: Add W25H512NWxxAM CMP locking support
This chip has support for the locking complement (CMP) feature. Add
the relevant bit to enable it.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Pratyush Yadav <pratyush@kernel.org>
| -rw-r--r-- | drivers/mtd/spi-nor/winbond.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index eaa547d36aad..ef73c855cedb 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -360,7 +360,8 @@ static const struct flash_info winbond_nor_parts[] = { }, { /* W25H512NWxxAM */ .id = SNOR_ID(0xef, 0xa0, 0x20), - .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP, + .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | + SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, }, { /* W25H01NWxxAM */ .id = SNOR_ID(0xef, 0xa0, 0x21), |