diff options
| author | Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2026-06-15 15:39:42 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2026-06-22 10:53:16 +0200 |
| commit | 2b005b458f6eeffdbe7705e6667437013b54e209 (patch) | |
| tree | e76990e0c9558650f807cf8a7a1d487b8f51b481 | |
| parent | c4a16f90797e2d8bebf875fd02547fef76ae3b76 (diff) | |
dt-bindings: clock: renesas,r9a09g077/87: Add PCLKRTC clock ID
Add the peripheral clock ID definition for the Real-Time Clock (PCLKRTC)
on the Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs.
Note that the PCLKRTC clock is utilized as the operating clock source
for the RTC IP.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260615143943.1610095-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| -rw-r--r-- | include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h | 1 | ||||
| -rw-r--r-- | include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h b/include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h index f6cb8d649a46..aa47685f329a 100644 --- a/include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h +++ b/include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h @@ -35,5 +35,6 @@ #define R9A09G077_XSPI_CLK1 23 #define R9A09G077_PCLKCAN 24 #define R9A09G077_LCDC_CLKD 25 +#define R9A09G077_PCLKRTC 26 #endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G077_CPG_H__ */ diff --git a/include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h b/include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h index 312e563b322e..1c73d0dcef18 100644 --- a/include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h +++ b/include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h @@ -35,5 +35,6 @@ #define R9A09G087_XSPI_CLK1 23 #define R9A09G087_PCLKCAN 24 #define R9A09G087_LCDC_CLKD 25 +#define R9A09G087_PCLKRTC 26 #endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G087_CPG_H__ */ |