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authorBjorn Andersson <andersson@kernel.org>2026-03-23 22:16:44 -0500
committerBjorn Andersson <andersson@kernel.org>2026-03-23 22:16:44 -0500
commit2064d217689fd047dae230b6d9dba7c32124a67f (patch)
tree8a6c21fe954e73438d4a4cc9156150956f9d5933
parent0f5c8f03d990f9be9908a08a701c324e113554d2 (diff)
parentfc6e29d42872680dca017f2e5169eefe971f8d89 (diff)
Merge branch '20260120-topic-7180_dispcc_bcr-v1-1-0b1b442156c3@oss.qualcomm.com' into clk-for-7.1
Merge the addition of reset constants to the SC7180 display clock controller through a topic branch, in order to make them available to the DeviceTree branch as well.
-rw-r--r--include/dt-bindings/clock/qcom,dispcc-sc7180.h7
1 files changed, 6 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/qcom,dispcc-sc7180.h b/include/dt-bindings/clock/qcom,dispcc-sc7180.h
index b9b51617a335..070510306074 100644
--- a/include/dt-bindings/clock/qcom,dispcc-sc7180.h
+++ b/include/dt-bindings/clock/qcom,dispcc-sc7180.h
@@ -6,6 +6,7 @@
#ifndef _DT_BINDINGS_CLK_QCOM_DISP_CC_SC7180_H
#define _DT_BINDINGS_CLK_QCOM_DISP_CC_SC7180_H
+/* Clocks */
#define DISP_CC_PLL0 0
#define DISP_CC_PLL0_OUT_EVEN 1
#define DISP_CC_MDSS_AHB_CLK 2
@@ -40,7 +41,11 @@
#define DISP_CC_MDSS_VSYNC_CLK_SRC 31
#define DISP_CC_XO_CLK 32
-/* DISP_CC GDSCR */
+/* Resets */
+#define DISP_CC_MDSS_CORE_BCR 0
+#define DISP_CC_MDSS_RSCC_BCR 1
+
+/* GDSCs */
#define MDSS_GDSC 0
#endif