diff options
| author | Marek Vasut <marek.vasut+renesas@mailbox.org> | 2026-01-18 14:49:52 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2026-03-06 13:18:46 +0100 |
| commit | 12424624c8484f79e02fdc8a437fd401bc21ed41 (patch) | |
| tree | 3f76b13962833c85b41a2c556685246220e100c2 | |
| parent | 457fad44b471b474ac6983b30f33e840b9362179 (diff) | |
arm64: dts: renesas: r8a77965: Describe PCIe root ports
Add nodes which describe the root ports in the PCIe controller DT nodes.
This can be used together with the pwrctrl driver to control clock and
power supply to a PCIe slot.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260118135038.8033-5-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a77965.dtsi | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi index 425561e658ca..611a9335c63a 100644 --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi @@ -2494,6 +2494,16 @@ iommu-map = <0 &ipmmu_hc 0 1>; iommu-map-mask = <0>; status = "disabled"; + + /* PCIe bridge, Root Port */ + pciec0_rp: pci@0,0 { + #address-cells = <3>; + #size-cells = <2>; + reg = <0x0 0x0 0x0 0x0 0x0>; + compatible = "pciclass,0604"; + device_type = "pci"; + ranges; + }; }; pciec1: pcie@ee800000 { @@ -2523,6 +2533,16 @@ iommu-map = <0 &ipmmu_hc 1 1>; iommu-map-mask = <0>; status = "disabled"; + + /* PCIe bridge, Root Port */ + pciec1_rp: pci@0,0 { + #address-cells = <3>; + #size-cells = <2>; + reg = <0x0 0x0 0x0 0x0 0x0>; + compatible = "pciclass,0604"; + device_type = "pci"; + ranges; + }; }; fdp1@fe940000 { |