diff options
| author | Shyam Sundar S K <Shyam-sundar.S-k@amd.com> | 2026-06-09 20:09:52 +0530 |
|---|---|---|
| committer | Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> | 2026-06-10 14:14:26 +0300 |
| commit | 043af31c8d3031bbeb77dfdc6373005ef3b8a23b (patch) | |
| tree | 11e7d8189d29a3c0d949f6121201d19b5e218c7e | |
| parent | c3a2521bcc8e4913a246132f276e5ce1251dd1cd (diff) | |
platform/x86/amd/pmc: Add PMC driver support for AMD 1Ah M80H SoC
The 1Ah M80H SoC uses a different set of SMU mailbox register offsets
compared to the existing 1Ah variants: message at 0xA10, argument at
0xA18, and response at 0xA14.
Add amd_1ah_m80_cpu_info with these offsets, wire it into the PCI ID
table via PCI_DEVICE_DATA(), populate scratch_reg field with
AMD_PMC_SCRATCH_REG_1AH and add the corresponding ACPI ID AMDI000C.
Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org>
Co-developed-by: Sanket Goswami <Sanket.Goswami@amd.com>
Signed-off-by: Sanket Goswami <Sanket.Goswami@amd.com>
Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
Link: https://patch.msgid.link/20260609143952.2999707-3-Shyam-sundar.S-k@amd.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
| -rw-r--r-- | drivers/platform/x86/amd/pmc/pmc.c | 12 | ||||
| -rw-r--r-- | drivers/platform/x86/amd/pmc/pmc.h | 6 |
2 files changed, 18 insertions, 0 deletions
diff --git a/drivers/platform/x86/amd/pmc/pmc.c b/drivers/platform/x86/amd/pmc/pmc.c index 92e36a6161a9..ccb37383b337 100644 --- a/drivers/platform/x86/amd/pmc/pmc.c +++ b/drivers/platform/x86/amd/pmc/pmc.c @@ -154,6 +154,16 @@ static const struct amd_pmc_cpu_info amd_1ah_m70_cpu_info = { .os_hint = MSG_OS_HINT_RN, }; +static const struct amd_pmc_cpu_info amd_1ah_m80_cpu_info = { + .smu_msg = AMD_PMC_REGISTER_MSG_1AH_80H, + .smu_arg = AMD_PMC_REGISTER_ARG_1AH_80H, + .smu_rsp = AMD_PMC_REGISTER_RSP_1AH_80H, + .num_ips = ARRAY_SIZE(soc15_ip_blk), + .scratch_reg = AMD_PMC_SCRATCH_REG_1AH, + .ips_ptr = soc15_ip_blk, + .os_hint = MSG_OS_HINT_RN, +}; + static const struct pci_device_id pmc_pci_ids[] = { { PCI_DEVICE_DATA(AMD, CPU_ID_PCO, &amd_pco_cpu_info) }, { PCI_DEVICE_DATA(AMD, CPU_ID_CZN, &amd_czn_cpu_info) }, @@ -165,6 +175,7 @@ static const struct pci_device_id pmc_pci_ids[] = { { PCI_DEVICE_DATA(AMD, CPU_ID_SHP, NULL) }, { PCI_DEVICE_DATA(AMD, 1AH_M20H_ROOT, NULL) }, { PCI_DEVICE_DATA(AMD, 1AH_M60H_ROOT, NULL) }, + { PCI_DEVICE_DATA(AMD, 1AH_M80H_ROOT, &amd_1ah_m80_cpu_info) }, { } }; @@ -860,6 +871,7 @@ static const struct acpi_device_id amd_pmc_acpi_ids[] = { {"AMDI0009", 0}, {"AMDI000A", 0}, {"AMDI000B", 0}, + {"AMDI000C", 0}, {"AMD0004", 0}, {"AMD0005", 0}, { } diff --git a/drivers/platform/x86/amd/pmc/pmc.h b/drivers/platform/x86/amd/pmc/pmc.h index 616faddc70b7..36756e25b4bd 100644 --- a/drivers/platform/x86/amd/pmc/pmc.h +++ b/drivers/platform/x86/amd/pmc/pmc.h @@ -22,6 +22,11 @@ /* SMU communication registers for 1Ah 20h SoC */ #define AMD_PMC_REGISTER_MSG_1AH_20H 0x938 +/* SMU communication registers for 1Ah 80h SoC */ +#define AMD_PMC_REGISTER_MSG_1AH_80H 0xA10 +#define AMD_PMC_REGISTER_ARG_1AH_80H 0xA18 +#define AMD_PMC_REGISTER_RSP_1AH_80H 0xA14 + /* PMC Scratch Registers */ #define AMD_PMC_SCRATCH_REG_CZN 0x94 #define AMD_PMC_SCRATCH_REG_YC 0xD14 @@ -186,6 +191,7 @@ void amd_mp2_stb_deinit(struct amd_pmc_dev *dev); #define PCI_DEVICE_ID_AMD_1AH_M20H_ROOT 0x1507 #define PCI_DEVICE_ID_AMD_1AH_M60H_ROOT 0x1122 +#define PCI_DEVICE_ID_AMD_1AH_M80H_ROOT 0x115b #define PCI_DEVICE_ID_AMD_MP2_STB 0x172c int amd_stb_s2d_init(struct amd_pmc_dev *dev); |