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/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
/* Copyright (c) 2026, NVIDIA CORPORATION. All rights reserved. */
#ifndef DT_BINDINGS_MEMORY_TEGRA238_MC_H
#define DT_BINDINGS_MEMORY_TEGRA238_MC_H
/* special clients */
#define TEGRA238_SID_INVALID 0x0
#define TEGRA238_SID_PASSTHROUGH 0x7f
/* ISO stream IDs */
#define TEGRA238_SID_ISO_NVDISPLAY 0x1
#define TEGRA238_SID_ISO_APE0 0x2
#define TEGRA238_SID_ISO_APE1 0x3
/* NISO stream IDs */
#define TEGRA238_SID_AON 0x1
#define TEGRA238_SID_BPMP 0x2
#define TEGRA238_SID_ETR 0x3
#define TEGRA238_SID_FDE 0x4
#define TEGRA238_SID_HC 0x5
#define TEGRA238_SID_HDA 0x6
#define TEGRA238_SID_NVDEC 0x7
#define TEGRA238_SID_NVDISPLAY 0x8
#define TEGRA238_SID_NVENC 0x9
#define TEGRA238_SID_OFA 0xa
#define TEGRA238_SID_PCIE0 0xb
#define TEGRA238_SID_PCIE1 0xc
#define TEGRA238_SID_PCIE2 0xd
#define TEGRA238_SID_PCIE3 0xe
#define TEGRA238_SID_HWMP_PMA 0xf
#define TEGRA238_SID_PSC 0x10
#define TEGRA238_SID_SDMMC1A 0x11
#define TEGRA238_SID_SDMMC4A 0x12
#define TEGRA238_SID_SES_SE0 0x13
#define TEGRA238_SID_SES_SE1 0x14
#define TEGRA238_SID_SES_SE2 0x15
#define TEGRA238_SID_SEU1_SE0 0x16
#define TEGRA238_SID_SEU1_SE1 0x17
#define TEGRA238_SID_SEU1_SE2 0x18
#define TEGRA238_SID_TSEC 0x19
#define TEGRA238_SID_UFSHC 0x1a
#define TEGRA238_SID_VIC 0x1b
#define TEGRA238_SID_XUSB_HOST 0x1c
#define TEGRA238_SID_XUSB_DEV 0x1d
#define TEGRA238_SID_GPCDMA_0 0x1e
#define TEGRA238_SID_SMMU_TEST 0x1f
/* Host1x virtualization clients. */
#define TEGRA238_SID_HOST1X_CTX0 0x20
#define TEGRA238_SID_HOST1X_CTX1 0x21
#define TEGRA238_SID_HOST1X_CTX2 0x22
#define TEGRA238_SID_HOST1X_CTX3 0x23
#define TEGRA238_SID_HOST1X_CTX4 0x24
#define TEGRA238_SID_HOST1X_CTX5 0x25
#define TEGRA238_SID_HOST1X_CTX6 0x26
#define TEGRA238_SID_HOST1X_CTX7 0x27
#define TEGRA238_SID_XUSB_VF0 0x28
#define TEGRA238_SID_XUSB_VF1 0x29
#define TEGRA238_SID_XUSB_VF2 0x2a
#define TEGRA238_SID_XUSB_VF3 0x2b
/* Host1x command buffers */
#define TEGRA238_SID_HC_VM0 0x2c
#define TEGRA238_SID_HC_VM1 0x2d
#define TEGRA238_SID_HC_VM2 0x2e
#define TEGRA238_SID_HC_VM3 0x2f
#define TEGRA238_SID_HC_VM4 0x30
#define TEGRA238_SID_HC_VM5 0x31
#define TEGRA238_SID_HC_VM6 0x32
#define TEGRA238_SID_HC_VM7 0x33
#endif
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