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path: root/drivers/pinctrl/aspeed/Kconfig
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# SPDX-License-Identifier: GPL-2.0-only
config PINCTRL_ASPEED
	bool
	depends on (ARCH_ASPEED || COMPILE_TEST) && OF
	select MFD_SYSCON
	select PINMUX
	select PINCONF
	select GENERIC_PINCONF
	select REGMAP_MMIO

config PINCTRL_ASPEED_G4
	bool "Aspeed G4 SoC pin control"
	depends on (MACH_ASPEED_G4 || COMPILE_TEST) && OF
	select PINCTRL_ASPEED
	help
	  Say Y here to enable pin controller support for Aspeed's 4th
	  generation SoCs. GPIO is provided by a separate GPIO driver.

config PINCTRL_ASPEED_G5
	bool "Aspeed G5 SoC pin control"
	depends on (MACH_ASPEED_G5 || COMPILE_TEST) && OF
	select PINCTRL_ASPEED
	help
	  Say Y here to enable pin controller support for Aspeed's 5th
	  generation SoCs. GPIO is provided by a separate GPIO driver.

config PINCTRL_ASPEED_G6
	bool "Aspeed G6 SoC pin control"
	depends on (MACH_ASPEED_G6 || COMPILE_TEST) && OF
	select PINCTRL_ASPEED
	help
	  Say Y here to enable pin controller support for Aspeed's 6th
	  generation SoCs. GPIO is provided by a separate GPIO driver.

config PINCTRL_ASPEED_G7_SOC0
	bool "Aspeed G7 SoC pin control"
	depends on (ARCH_ASPEED || COMPILE_TEST) && OF
	select PINCTRL_ASPEED
	help
	  Say Y here to enable pin controller support for the SoC0 instance
	  of Aspeed's 7th generation SoCs. GPIO is provided by a separate
	  GPIO driver.

config PINCTRL_ASPEED_G7_SOC1
	bool "Aspeed G7 SoC1 pin control"
	depends on (ARCH_ASPEED || COMPILE_TEST) && OF
	select MFD_SYSCON
	select PINMUX
	select GENERIC_PINCTRL_GROUPS
	select GENERIC_PINMUX_FUNCTIONS
	select GENERIC_PINCONF
	select REGMAP_MMIO
	help
	  Say Y here to enable pin controller support for the SoC1 instance
	  of Aspeed's 7th generation SoCs. GPIO is provided by a separate
	  GPIO driver.