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Author
2025-08-15
Merge tag 'drm-xe-fixes-2025-08-14' of https://gitlab.freedesktop.org/drm/xe/...
Dave Airlie
2025-08-15
Merge tag 'drm-intel-fixes-2025-08-13' of https://gitlab.freedesktop.org/drm/...
Dave Airlie
2025-08-14
drm/panel: novatek-nt35560: Clean up driver
Brigham Campbell
2025-08-14
drm: Add MIPI read_multi func and two write macros
Brigham Campbell
2025-08-14
drm/xe/pf: Set VF LMEM BAR size
Michał Winiarski
2025-08-14
drm/mediatek: dsi: Fix DSI host and panel bridge pre-enable order
Louis-Alexis Eyraud
2025-08-14
drm/i915/display: drop __to_intel_display() usage
Jani Nikula
2025-08-14
drm/i915/reg: separate VLV_DSPCLK_GATE_D from DSPCLK_GATE_D
Jani Nikula
2025-08-14
drm/i915/gvt: convert mmio table to struct intel_display
Jani Nikula
2025-08-14
drm/i915/uncore: pass display to HAS_FPGA_DBG_UNCLAIMED()
Jani Nikula
2025-08-14
drm/i915/drv: pass display to HAS_DISPLAY()
Jani Nikula
2025-08-14
drm/i915/switcheroo: pass display to HAS_DISPLAY()
Jani Nikula
2025-08-14
drm/i915/gem: pass display to HAS_DISPLAY()
Jani Nikula
2025-08-14
drm/i915/gmch: pass display to DISPLAY_VER()
Jani Nikula
2025-08-14
drm/i915/dram: pass display to macros that expect display
Jani Nikula
2025-08-14
drm/i915/irq: pass display to macros that expect display
Jani Nikula
2025-08-14
drm/i915/clockgating: pass display to DSPCNTR and DSPSURF register macros
Jani Nikula
2025-08-14
drm/i915/clockgating: pass display to HAS_PCH_*() macros
Jani Nikula
2025-08-14
drm/i915/clockgating: pass display to for_each_pipe()
Jani Nikula
2025-08-14
drm/i915/fb: pass display to HAS_GMCH() and DISPLAY_VER()
Jani Nikula
2025-08-14
drm/i915/display: pass display to HAS_PCH_*() macros
Jani Nikula
2025-08-14
drm/i915: silence rpm wakeref asserts on GEN11_GU_MISC_IIR access
Jani Nikula
2025-08-14
drm/rockchip: vop2: make vp registers nonvolatile
Piotr Zalewski
2025-08-14
drm/rockchip: cdn-dp: select bridge for cdp-dp
Rudi Heitbaum
2025-08-14
drm: renesas: rz-du: mipi_dsi: Convert to RUNTIME_PM_OPS()
Geert Uytterhoeven
2025-08-13
drm/mediatek: Add error handling for old state CRTC in atomic_disable
Jason-JH Lin
2025-08-14
Merge tag 'amd-drm-fixes-6.17-2025-08-13' of https://gitlab.freedesktop.org/a...
Dave Airlie
2025-08-13
drm/simpledrm: Use of_reserved_mem_region_to_resource() for "memory-region"
Rob Herring (Arm)
2025-08-14
Merge tag 'drm-misc-next-fixes-2025-08-12' of https://gitlab.freedesktop.org/...
Dave Airlie
2025-08-13
drm/msm/dpu: Initialize crtc_state to NULL in dpu_plane_virtual_atomic_check()
Nathan Chancellor
2025-08-13
drm/msm: update the high bitfield of certain DSI registers
Ayushi Makhija
2025-08-13
drm/msm/dpu: correct dpu_plane_virtual_atomic_check()
Dmitry Baryshkov
2025-08-13
drm/msm/kms: move snapshot init earlier in KMS init
Dmitry Baryshkov
2025-08-13
drm/msm/dsi: Fix 14nm DSI PHY PLL Lock issue
Loic Poulain
2025-08-13
drm: nova: update ARef import from sync::aref
Shankari Anand
2025-08-13
drm/i915/wcl: Add display device info
Imre Deak
2025-08-13
drm/i915/display: Add power well mapping for WCL
Chaitanya Kumar Borah
2025-08-13
drm/i915/tc: Debug print the pin assignment and max lane count
Imre Deak
2025-08-13
drm/i915/tc: Cache the pin assignment value
Imre Deak
2025-08-13
dmc/i915/tc: Report pin assignment NONE in TBT-alt mode
Imre Deak
2025-08-13
drm/i915/tc: Pass intel_tc_port to internal lane mask/count helpers
Imre Deak
2025-08-13
drm/i915/tc: Handle non-TC encoders when getting the pin assignment
Imre Deak
2025-08-13
drm/i915/tc: Unify the way to get the max lane count value on MTL+
Imre Deak
2025-08-13
drm/i915/tc: Unify the way to get the pin assignment on all platforms
Imre Deak
2025-08-13
drm/i915/tc: Validate the pin assignment on all platforms
Imre Deak
2025-08-13
drm/i915/tc: Handle pin assignment NONE on all platforms
Imre Deak
2025-08-13
drm/i915/tc: Pass pin assignment value around using the pin assignment enum
Imre Deak
2025-08-13
drm/i915/tc: Add an enum for the TypeC pin assignment
Imre Deak
2025-08-13
drm/i915/tc: Move asserting the power state after reading TCSS_DDI_STATUS
Imre Deak
2025-08-13
drm/i915/tc: Move getting the power domain before reading DFLEX registers
Imre Deak
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