summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/xe/regs
AgeCommit message (Expand)Author
2026-05-18drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN4Gustavo Sousa
2026-05-18drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN1Gustavo Sousa
2026-05-18drm/xe: Define CACHE_MODE_1 as MCR registerGustavo Sousa
2026-04-29drm/xe: Mark ROW_CHICKEN5 as a masked registerMatt Roper
2026-03-23drm/xe: Implement recent spec updates to Wa_16025250150Matt Roper
2026-03-23drm/xe: Add PR_CTR_CTRL/THRSH register definitionsMichal Wajdeczko
2026-03-17Merge tag 'drm-intel-next-2026-03-16' of https://gitlab.freedesktop.org/drm/i...Dave Airlie
2026-03-10drm/xe: Translate C-state "reset value" into RC6Gustavo Sousa
2026-03-10drm/xe/xe3p: Drop Wa_16028780921Gustavo Sousa
2026-03-10drm/xe/nvlp: Implement Wa_14026539277Gustavo Sousa
2026-03-10drm/xe: Allow per queue programming of COMMON_SLICE_CHICKEN3 bit13Lionel Landwerlin
2026-03-10drm/xe: Add Wa_14026578760Varun Gupta
2026-03-05drm/xe/xe_hw_error: Add support for PVC SoC errorsRiana Tauro
2026-03-05drm/xe/xe_hw_error: Add support for Core-Compute errorsRiana Tauro
2026-03-04drm/intel: add pick.h for the various "picker" helpersJani Nikula
2026-02-27drm/xe/tuning: Apply windower hardware filtering setting on Xe3 and Xe3pMatt Roper
2026-02-19drm/xe/xe3p_lpg: Add Wa_14026781792Nitin Gote
2026-02-19drm/xe/wa: Steer RMW of MCR registers while building default LRCMatt Roper
2026-02-10drm/xe/xe3p_lpg: Set STLB bank hash mode to 4KBAradhya Bhatia
2026-02-10drm/xe/xe3p_lpg: Extend 'group ID' mask sizeMatt Roper
2026-02-10drm/xe/xe3p_lpg: Add initial workarounds for graphics version 35.10Shekhar Chauhan
2026-02-09drm/xe/guc: Add Wa_14025883347 for GuC DMA failure on resetSk Anirban
2026-02-06drm/xe/xe3p_xpc: XeCore mask spans four registersMatt Roper
2026-02-05drm/xe: Add GSC to powergate_infoVinay Belgaumkar
2026-01-14drm/xe/mert: Improve handling of MERT CAT errorsMichal Wajdeczko
2026-01-12drm/xe/hwmon: Expose individual VRAM channel temperatureKarthik Poosa
2026-01-09drm/xe: Allow compressible surfaces to be 1-way coherentXin Wang
2025-12-23drm/xe/soc_remapper: Add system controller config for SoC remapperUmesh Nerlige Ramappa
2025-12-23drm/xe/soc_remapper: Use SoC remapper helper from VSEC codeUmesh Nerlige Ramappa
2025-12-16drm/xe/oa/uapi: Expose MERT OA unitAshutosh Dixit
2025-12-12drm/xe: Track pre-production workaround supportMatt Roper
2025-12-12drm/xe: Create page reclaim list on unbindBrian Nguyen
2025-12-04drm/xe/rtp: Whitelist OAM MMIO trigger registersAshutosh Dixit
2025-12-01drm/xe/xe3_lpg: Apply Wa_16028005424Balasubramani Vivekanandan
2025-11-25drm/xe/pf: Handle MERT catastrophic errorsLukasz Laguna
2025-11-25drm/xe/pf: Add TLB invalidation support for MERTLukasz Laguna
2025-11-25drm/xe/pf: Configure LMTT in MERTLukasz Laguna
2025-11-10drm/xe: Use SG_TILE_ADDR_RANGE instead of TILE_ADDR_RANGEFei Yang
2025-10-30drm/xe/cri: Add new performance limit reasons bitsSk Anirban
2025-10-29drm/xe/xe_debugfs: Expose G7 package state residency counter through debugfsMohammed Thasleem
2025-10-27drm/xe/xe3: Add WA_14024681466 for Xe3_LPGNitin Gote
2025-10-20drm/xe/xe3p_lpm: Add special check in Media GT for Main GAMCTRLBalasubramani Vivekanandan
2025-10-20drm/xe/xe3p_lpm: Configure MAIN_GAMCTRL_QUEUE_SELECTBrian Welty
2025-10-18drm/xe/xe3p_xpc: Add support for compute walker for non-MSIxLucas De Marchi
2025-10-18drm/xe/irq: Check fuse mask for media enginesLucas De Marchi
2025-10-18drm/xe/irq: Rename bits used with all enginesLucas De Marchi
2025-10-17drm/xe/xe3p: Dump CSMQDEBUG registerWang Xin
2025-10-17drm/xe: Dump CURRENT_LRCA registerWang Xin
2025-10-17drm/xe/xe3p: Determine service copy availability from fuseMatt Roper
2025-10-17drm/xe: Drop CTC_MODE register readBalasubramani Vivekanandan
generated by cgit v1.2.3 (git 2.25.1) at 2026-06-06 03:10:12 +0000