| Age | Commit message (Expand) | Author |
|---|---|---|
| 2025-09-19 | riscv: errata: Fix the PAUSE Opcode for MIPS P8700 | Djordje Todorovic |
| 2025-09-16 | riscv: Replace __ASSEMBLY__ with __ASSEMBLER__ in non-uapi headers | Thomas Huth |
| 2024-07-12 | riscv: Provide a definition for 'pause' | Andrew Jones |
| 2023-10-31 | riscv: Using TOOLCHAIN_HAS_ZIHINTPAUSE marco replace zihintpause | Minda Chen |
| 2023-01-31 | Merge patch "riscv: Fix build with CONFIG_CC_OPTIMIZE_FOR_SIZE=y" | Palmer Dabbelt |
| 2023-01-31 | riscv: Fix build with CONFIG_CC_OPTIMIZE_FOR_SIZE=y | Samuel Holland |
| 2022-10-27 | riscv: fix detection of toolchain Zihintpause support | Conor Dooley |
| 2022-08-11 | arch/riscv: add Zihintpause support | Dao Lu |
| 2020-11-25 | RISC-V: fix barrier() use in <vdso/processor.h> | Randy Dunlap |
| 2020-06-10 | riscv: use vDSO common flow to reduce the latency of the time-related functions | Vincent Chen |
