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-rw-r--r--arch/alpha/include/uapi/asm/ioctls.h8
-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/boot/dts/nxp/imx/imx6q-ba16.dtsi2
-rw-r--r--arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi1
-rw-r--r--arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106.dts2
-rw-r--r--arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81.dtsi5
-rw-r--r--arch/arm64/boot/dts/freescale/imx8qm-mek.dts3
-rw-r--r--arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi8
-rw-r--r--arch/arm64/boot/dts/freescale/imx95.dtsi2
-rw-r--r--arch/arm64/boot/dts/freescale/mba8mx.dtsi2
-rw-r--r--arch/arm64/boot/dts/ti/k3-am62-lp-sk-nand.dtso2
-rw-r--r--arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-peb-c-010.dtso7
-rw-r--r--arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-x27-gpio1-spi1-uart3.dtso8
-rw-r--r--arch/arm64/include/asm/suspend.h2
-rw-r--r--arch/arm64/mm/proc.S8
-rw-r--r--arch/csky/mm/fault.c4
-rw-r--r--arch/riscv/boot/Makefile4
-rw-r--r--arch/riscv/include/asm/pgtable.h4
-rw-r--r--arch/riscv/kernel/cpufeature.c23
-rw-r--r--arch/sparc/kernel/pci.c23
20 files changed, 73 insertions, 47 deletions
diff --git a/arch/alpha/include/uapi/asm/ioctls.h b/arch/alpha/include/uapi/asm/ioctls.h
index 971311605288..a09d04b49cc6 100644
--- a/arch/alpha/include/uapi/asm/ioctls.h
+++ b/arch/alpha/include/uapi/asm/ioctls.h
@@ -23,10 +23,10 @@
#define TCSETSW _IOW('t', 21, struct termios)
#define TCSETSF _IOW('t', 22, struct termios)
-#define TCGETA _IOR('t', 23, struct termio)
-#define TCSETA _IOW('t', 24, struct termio)
-#define TCSETAW _IOW('t', 25, struct termio)
-#define TCSETAF _IOW('t', 28, struct termio)
+#define TCGETA 0x40127417
+#define TCSETA 0x80127418
+#define TCSETAW 0x80127419
+#define TCSETAF 0x8012741c
#define TCSBRK _IO('t', 29)
#define TCXONC _IO('t', 30)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 4fb985b76e97..70cd3b5b5a05 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1215,7 +1215,7 @@ config HIGHMEM
config HIGHPTE
bool "Allocate 2nd-level pagetables from highmem" if EXPERT
- depends on HIGHMEM
+ depends on HIGHMEM && !PREEMPT_RT
default y
help
The VM uses one page of physical memory for each page table.
diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-ba16.dtsi b/arch/arm/boot/dts/nxp/imx/imx6q-ba16.dtsi
index 53013b12c2ec..02d66523668d 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6q-ba16.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6q-ba16.dtsi
@@ -337,7 +337,7 @@
pinctrl-0 = <&pinctrl_rtc>;
reg = <0x32>;
interrupt-parent = <&gpio4>;
- interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
};
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
index 68c2e0156a5c..f8303b7e2bd2 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
@@ -113,6 +113,7 @@
ethphy0f: ethernet-phy@1 { /* SMSC LAN8740Ai */
compatible = "ethernet-phy-id0007.c110",
"ethernet-phy-ieee802.3-c22";
+ clocks = <&clk IMX8MP_CLK_ENET_QOS>;
interrupt-parent = <&gpio3>;
interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
pinctrl-0 = <&pinctrl_ethphy0>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106.dts b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106.dts
index 88ad422c2760..399230144ce3 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106.dts
@@ -9,7 +9,7 @@
#include "imx8mp-tx8p-ml81.dtsi"
/ {
- compatible = "gocontroll,moduline-display", "fsl,imx8mp";
+ compatible = "gocontroll,moduline-display-106", "karo,tx8p-ml81", "fsl,imx8mp";
chassis-type = "embedded";
hardware = "Moduline Display V1.06";
model = "GOcontroll Moduline Display baseboard";
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81.dtsi
index fe8ba16eb40e..761ee046eb72 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81.dtsi
@@ -47,6 +47,7 @@
<&clk IMX8MP_SYS_PLL2_100M>,
<&clk IMX8MP_SYS_PLL2_50M>;
assigned-clock-rates = <266000000>, <100000000>, <50000000>;
+ nvmem-cells = <&eth_mac1>;
phy-handle = <&ethphy0>;
phy-mode = "rmii";
pinctrl-0 = <&pinctrl_eqos>;
@@ -75,6 +76,10 @@
};
};
+&fec {
+ nvmem-cells = <&eth_mac2>;
+};
+
&gpio1 {
gpio-line-names = "SODIMM_152",
"SODIMM_42",
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
index 9c0b6b8d6459..df99fe88cf4a 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
@@ -256,6 +256,7 @@
regulator-max-microvolt = <3000000>;
gpio = <&lsio_gpio4 7 GPIO_ACTIVE_HIGH>;
enable-active-high;
+ off-on-delay-us = <4800>;
};
reg_audio: regulator-audio {
@@ -560,7 +561,7 @@
compatible = "isil,isl29023";
reg = <0x44>;
interrupt-parent = <&lsio_gpio4>;
- interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
+ interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
};
pressure-sensor@60 {
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
index d4856b8590e0..e186c31bfd48 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi
@@ -171,25 +171,25 @@
&lpuart0 {
compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
- dmas = <&edma2 13 0 0>, <&edma2 12 0 1>;
+ dmas = <&edma2 12 0 FSL_EDMA_RX>, <&edma2 13 0 0>;
dma-names = "rx","tx";
};
&lpuart1 {
compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
- dmas = <&edma2 15 0 0>, <&edma2 14 0 1>;
+ dmas = <&edma2 14 0 FSL_EDMA_RX>, <&edma2 15 0 0>;
dma-names = "rx","tx";
};
&lpuart2 {
compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
- dmas = <&edma2 17 0 0>, <&edma2 16 0 1>;
+ dmas = <&edma2 16 0 FSL_EDMA_RX>, <&edma2 17 0 0>;
dma-names = "rx","tx";
};
&lpuart3 {
compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
- dmas = <&edma2 19 0 0>, <&edma2 18 0 1>;
+ dmas = <&edma2 18 0 FSL_EDMA_RX>, <&edma2 19 0 0>;
dma-names = "rx","tx";
};
diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index 6da961eb3fe5..583c5f7a84b5 100644
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -806,7 +806,7 @@
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <3>;
#size-cells = <0>;
- clocks = <&scmi_clk IMX95_CLK_BUSAON>,
+ clocks = <&scmi_clk IMX95_CLK_BUSWAKEUP>,
<&scmi_clk IMX95_CLK_I3C2SLOW>;
clock-names = "pclk", "fast_clk";
status = "disabled";
diff --git a/arch/arm64/boot/dts/freescale/mba8mx.dtsi b/arch/arm64/boot/dts/freescale/mba8mx.dtsi
index 79daba930ad6..3e41da4d6122 100644
--- a/arch/arm64/boot/dts/freescale/mba8mx.dtsi
+++ b/arch/arm64/boot/dts/freescale/mba8mx.dtsi
@@ -185,7 +185,7 @@
reset-assert-us = <500000>;
reset-deassert-us = <500>;
interrupt-parent = <&expander2>;
- interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
+ interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
};
};
};
diff --git a/arch/arm64/boot/dts/ti/k3-am62-lp-sk-nand.dtso b/arch/arm64/boot/dts/ti/k3-am62-lp-sk-nand.dtso
index 173ac60723b6..b4daa674eaa1 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-lp-sk-nand.dtso
+++ b/arch/arm64/boot/dts/ti/k3-am62-lp-sk-nand.dtso
@@ -14,7 +14,7 @@
};
&main_pmx0 {
- gpmc0_pins_default: gpmc0-pins-default {
+ gpmc0_pins_default: gpmc0-default-pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x003c, PIN_INPUT, 0) /* (K19) GPMC0_AD0 */
AM62X_IOPAD(0x0040, PIN_INPUT, 0) /* (L19) GPMC0_AD1 */
diff --git a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-peb-c-010.dtso b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-peb-c-010.dtso
index 7fc73cfacadb..1176a52d560b 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-peb-c-010.dtso
+++ b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-peb-c-010.dtso
@@ -30,13 +30,10 @@
<&main_pktdma 0xc206 15>, /* egress slice 1 */
<&main_pktdma 0xc207 15>, /* egress slice 1 */
<&main_pktdma 0x4200 15>, /* ingress slice 0 */
- <&main_pktdma 0x4201 15>, /* ingress slice 1 */
- <&main_pktdma 0x4202 0>, /* mgmnt rsp slice 0 */
- <&main_pktdma 0x4203 0>; /* mgmnt rsp slice 1 */
+ <&main_pktdma 0x4201 15>; /* ingress slice 1 */
dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
"tx1-0", "tx1-1", "tx1-2", "tx1-3",
- "rx0", "rx1",
- "rxmgm0", "rxmgm1";
+ "rx0", "rx1";
firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
diff --git a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-x27-gpio1-spi1-uart3.dtso b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-x27-gpio1-spi1-uart3.dtso
index 996c42ec4253..bea8efa3e909 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-x27-gpio1-spi1-uart3.dtso
+++ b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-x27-gpio1-spi1-uart3.dtso
@@ -20,13 +20,13 @@
};
&main_pmx0 {
- main_gpio1_exp_header_gpio_pins_default: main-gpio1-exp-header-gpio-pins-default {
+ main_gpio1_exp_header_gpio_pins_default: main-gpio1-exp-header-gpio-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x0220, PIN_INPUT, 7) /* (D14) SPI1_CS1.GPIO1_48 */
>;
};
- main_spi1_pins_default: main-spi1-pins-default {
+ main_spi1_pins_default: main-spi1-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x0224, PIN_INPUT, 0) /* (C14) SPI1_CLK */
AM64X_IOPAD(0x021C, PIN_OUTPUT, 0) /* (B14) SPI1_CS0 */
@@ -35,7 +35,7 @@
>;
};
- main_uart3_pins_default: main-uart3-pins-default {
+ main_uart3_pins_default: main-uart3-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x0048, PIN_INPUT, 2) /* (U20) GPMC0_AD3.UART3_RXD */
AM64X_IOPAD(0x004c, PIN_OUTPUT, 2) /* (U18) GPMC0_AD4.UART3_TXD */
@@ -52,7 +52,7 @@
&main_spi1 {
pinctrl-names = "default";
pinctrl-0 = <&main_spi1_pins_default>;
- ti,pindir-d0-out-d1-in = <1>;
+ ti,pindir-d0-out-d1-in;
status = "okay";
};
diff --git a/arch/arm64/include/asm/suspend.h b/arch/arm64/include/asm/suspend.h
index 0cde2f473971..eb60c9735553 100644
--- a/arch/arm64/include/asm/suspend.h
+++ b/arch/arm64/include/asm/suspend.h
@@ -2,7 +2,7 @@
#ifndef __ASM_SUSPEND_H
#define __ASM_SUSPEND_H
-#define NR_CTX_REGS 13
+#define NR_CTX_REGS 14
#define NR_CALLEE_SAVED_REGS 12
/*
diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S
index 86818511962b..17df19647556 100644
--- a/arch/arm64/mm/proc.S
+++ b/arch/arm64/mm/proc.S
@@ -100,6 +100,10 @@ SYM_FUNC_START(cpu_do_suspend)
* call stack.
*/
str x18, [x0, #96]
+alternative_if ARM64_HAS_TCR2
+ mrs x2, REG_TCR2_EL1
+ str x2, [x0, #104]
+alternative_else_nop_endif
ret
SYM_FUNC_END(cpu_do_suspend)
@@ -134,6 +138,10 @@ SYM_FUNC_START(cpu_do_resume)
msr tcr_el1, x8
msr vbar_el1, x9
msr mdscr_el1, x10
+alternative_if ARM64_HAS_TCR2
+ ldr x2, [x0, #104]
+ msr REG_TCR2_EL1, x2
+alternative_else_nop_endif
msr sctlr_el1, x12
set_this_cpu_offset x13
diff --git a/arch/csky/mm/fault.c b/arch/csky/mm/fault.c
index a6ca7dff4215..7ff401108985 100644
--- a/arch/csky/mm/fault.c
+++ b/arch/csky/mm/fault.c
@@ -45,8 +45,8 @@ static inline void csky_cmpxchg_fixup(struct pt_regs *regs)
if (trap_no(regs) != VEC_TLBMODIFIED)
return;
- if (instruction_pointer(regs) == csky_cmpxchg_stw)
- instruction_pointer_set(regs, csky_cmpxchg_ldw);
+ if (instruction_pointer(regs) == (unsigned long)&csky_cmpxchg_stw)
+ instruction_pointer_set(regs, (unsigned long)&csky_cmpxchg_ldw);
return;
}
#endif
diff --git a/arch/riscv/boot/Makefile b/arch/riscv/boot/Makefile
index bfc3d0b75b9b..5301adf5f3f5 100644
--- a/arch/riscv/boot/Makefile
+++ b/arch/riscv/boot/Makefile
@@ -31,11 +31,7 @@ $(obj)/xipImage: vmlinux FORCE
endif
-ifdef CONFIG_RELOCATABLE
-$(obj)/Image: vmlinux.unstripped FORCE
-else
$(obj)/Image: vmlinux FORCE
-endif
$(call if_changed,objcopy)
$(obj)/Image.gz: $(obj)/Image FORCE
diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
index 5a08eb5fe99f..30d1ea93dde3 100644
--- a/arch/riscv/include/asm/pgtable.h
+++ b/arch/riscv/include/asm/pgtable.h
@@ -124,10 +124,6 @@
#ifdef CONFIG_64BIT
#include <asm/pgtable-64.h>
-#define VA_USER_SV39 (UL(1) << (VA_BITS_SV39 - 1))
-#define VA_USER_SV48 (UL(1) << (VA_BITS_SV48 - 1))
-#define VA_USER_SV57 (UL(1) << (VA_BITS_SV57 - 1))
-
#define MMAP_VA_BITS_64 ((VA_BITS >= VA_BITS_SV48) ? VA_BITS_SV48 : VA_BITS)
#define MMAP_MIN_VA_BITS_64 (VA_BITS_SV39)
#define MMAP_VA_BITS (is_compat_task() ? VA_BITS_SV32 : MMAP_VA_BITS_64)
diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
index 72ca768f4e91..2367e9755524 100644
--- a/arch/riscv/kernel/cpufeature.c
+++ b/arch/riscv/kernel/cpufeature.c
@@ -279,23 +279,22 @@ static const unsigned int riscv_a_exts[] = {
RISCV_ISA_EXT_ZALRSC,
};
+#define RISCV_ISA_EXT_ZKN \
+ RISCV_ISA_EXT_ZBKB, \
+ RISCV_ISA_EXT_ZBKC, \
+ RISCV_ISA_EXT_ZBKX, \
+ RISCV_ISA_EXT_ZKND, \
+ RISCV_ISA_EXT_ZKNE, \
+ RISCV_ISA_EXT_ZKNH
+
static const unsigned int riscv_zk_bundled_exts[] = {
- RISCV_ISA_EXT_ZBKB,
- RISCV_ISA_EXT_ZBKC,
- RISCV_ISA_EXT_ZBKX,
- RISCV_ISA_EXT_ZKND,
- RISCV_ISA_EXT_ZKNE,
+ RISCV_ISA_EXT_ZKN,
RISCV_ISA_EXT_ZKR,
- RISCV_ISA_EXT_ZKT,
+ RISCV_ISA_EXT_ZKT
};
static const unsigned int riscv_zkn_bundled_exts[] = {
- RISCV_ISA_EXT_ZBKB,
- RISCV_ISA_EXT_ZBKC,
- RISCV_ISA_EXT_ZBKX,
- RISCV_ISA_EXT_ZKND,
- RISCV_ISA_EXT_ZKNE,
- RISCV_ISA_EXT_ZKNH,
+ RISCV_ISA_EXT_ZKN
};
static const unsigned int riscv_zks_bundled_exts[] = {
diff --git a/arch/sparc/kernel/pci.c b/arch/sparc/kernel/pci.c
index a9448088e762..b290107170e9 100644
--- a/arch/sparc/kernel/pci.c
+++ b/arch/sparc/kernel/pci.c
@@ -181,6 +181,28 @@ static int __init ofpci_debug(char *str)
__setup("ofpci_debug=", ofpci_debug);
+static void of_fixup_pci_pref(struct pci_dev *dev, int index,
+ struct resource *res)
+{
+ struct pci_bus_region region;
+
+ if (!(res->flags & IORESOURCE_MEM_64))
+ return;
+
+ if (!resource_size(res))
+ return;
+
+ pcibios_resource_to_bus(dev->bus, &region, res);
+ if (region.end <= ~((u32)0))
+ return;
+
+ if (!(res->flags & IORESOURCE_PREFETCH)) {
+ res->flags |= IORESOURCE_PREFETCH;
+ pci_info(dev, "reg 0x%x: fixup: pref added to 64-bit resource\n",
+ index);
+ }
+}
+
static unsigned long pci_parse_of_flags(u32 addr0)
{
unsigned long flags = 0;
@@ -244,6 +266,7 @@ static void pci_parse_of_addrs(struct platform_device *op,
res->end = op_res->end;
res->flags = flags;
res->name = pci_name(dev);
+ of_fixup_pci_pref(dev, i, res);
pci_info(dev, "reg 0x%x: %pR\n", i, res);
}