diff options
| -rw-r--r-- | .mailmap | 3 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/clock/qcom,ipq9574-cmn-pll.yaml | 2 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/clock/qcom,qca8k-nsscc.yaml | 2 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/net/qcom,ipq9574-ppe.yaml | 2 | ||||
| -rw-r--r-- | MAINTAINERS | 4 |
5 files changed, 7 insertions, 6 deletions
@@ -526,7 +526,8 @@ Luca Ceresoli <luca.ceresoli@bootlin.com> <luca@lucaceresoli.net> Luca Weiss <luca@lucaweiss.eu> <luca@z3ntu.xyz> Lucas De Marchi <demarchi@kernel.org> <lucas.demarchi@intel.com> Lukasz Luba <lukasz.luba@arm.com> <l.luba@partner.samsung.com> -Luo Jie <quic_luoj@quicinc.com> <luoj@codeaurora.org> +Luo Jie <jie.luo@oss.qualcomm.com> <luoj@codeaurora.org> +Luo Jie <jie.luo@oss.qualcomm.com> <quic_luoj@quicinc.com> Lance Yang <lance.yang@linux.dev> <ioworker0@gmail.com> Lance Yang <lance.yang@linux.dev> <mingzhe.yang@ly.com> Maciej W. Rozycki <macro@mips.com> <macro@imgtec.com> diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq9574-cmn-pll.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq9574-cmn-pll.yaml index de338c05190f..8cb86d74e489 100644 --- a/Documentation/devicetree/bindings/clock/qcom,ipq9574-cmn-pll.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,ipq9574-cmn-pll.yaml @@ -8,7 +8,7 @@ title: Qualcomm CMN PLL Clock Controller on IPQ SoC maintainers: - Bjorn Andersson <andersson@kernel.org> - - Luo Jie <quic_luoj@quicinc.com> + - Luo Jie <jie.luo@oss.qualcomm.com> description: The CMN (or common) PLL clock controller expects a reference diff --git a/Documentation/devicetree/bindings/clock/qcom,qca8k-nsscc.yaml b/Documentation/devicetree/bindings/clock/qcom,qca8k-nsscc.yaml index 61473385da2d..480745349a5d 100644 --- a/Documentation/devicetree/bindings/clock/qcom,qca8k-nsscc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,qca8k-nsscc.yaml @@ -8,7 +8,7 @@ title: Qualcomm NSS Clock & Reset Controller on QCA8386/QCA8084 maintainers: - Bjorn Andersson <andersson@kernel.org> - - Luo Jie <quic_luoj@quicinc.com> + - Luo Jie <jie.luo@oss.qualcomm.com> description: | Qualcomm NSS clock control module provides the clocks and resets diff --git a/Documentation/devicetree/bindings/net/qcom,ipq9574-ppe.yaml b/Documentation/devicetree/bindings/net/qcom,ipq9574-ppe.yaml index 753f370b7605..6d0b21a10732 100644 --- a/Documentation/devicetree/bindings/net/qcom,ipq9574-ppe.yaml +++ b/Documentation/devicetree/bindings/net/qcom,ipq9574-ppe.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm IPQ packet process engine (PPE) maintainers: - - Luo Jie <quic_luoj@quicinc.com> + - Luo Jie <jie.luo@oss.qualcomm.com> - Lei Wei <quic_leiwei@quicinc.com> - Suruchi Agarwal <quic_suruchia@quicinc.com> - Pavithra R <quic_pavir@quicinc.com> diff --git a/MAINTAINERS b/MAINTAINERS index 4a290dc1284e..4c7db470a63e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -22145,9 +22145,9 @@ F: Documentation/devicetree/bindings/power/supply/qcom,pmi8998-charger.yaml F: drivers/power/supply/qcom_smbx.c QUALCOMM PPE DRIVER -M: Luo Jie <quic_luoj@quicinc.com> +M: Luo Jie <jie.luo@oss.qualcomm.com> L: netdev@vger.kernel.org -S: Supported +S: Maintained F: Documentation/devicetree/bindings/net/qcom,ipq9574-ppe.yaml F: Documentation/networking/device_drivers/ethernet/qualcomm/ppe/ppe.rst F: drivers/net/ethernet/qualcomm/ppe/ |