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authorKuldeep Singh <kuldeep.singh@oss.qualcomm.com>2026-04-02 00:05:09 +0530
committerBjorn Andersson <andersson@kernel.org>2026-05-12 15:48:16 -0500
commitfa9c7403af64d3e56a6c20dedc60e0a55b527509 (patch)
tree2def41526a129986b33f5c685f5b7894988f8589 /tools/perf/scripts/python
parentf4d7c5875a215cd3989b59d13a9c30cec9f0a33b (diff)
arm64: dts: qcom: kodiak: Fix ICE reg size
The ICE register region on Kodiak is currently defined as 0x8000 bytes. According to the hardware specification, the correct register size is 0x18000. Update the ICE node reg property to match the hardware. Fixes: dfd5ee7b34bb ("arm64: dts: qcom: sc7280: Add inline crypto engine") Signed-off-by: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com> Reviewed-by: Harshal Dev <harshal.dev@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260402-ice_dt_reg_fix-v1-1-74e4c2129238@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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