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| author | Daniel Almeida <daniel.almeida@collabora.com> | 2026-04-09 10:51:24 -0700 |
|---|---|---|
| committer | Alice Ryhl <aliceryhl@google.com> | 2026-04-27 18:43:04 +0000 |
| commit | 7b00648f48f5ac90d66f9eab4dfe121308a1076e (patch) | |
| tree | 75f56fd26ba5e29a679fb1b2a528bdd5e51e9e97 /tools/perf/scripts/python | |
| parent | 16df3873c80388a71c4695909a51be0c809b889c (diff) | |
drm/tyr: Use register! macro for GPU_CONTROL
Define the GPU_CONTROL register block with the kernel's register! macro
and switch the current GPU control paths over to the new typed register
definitions.
This replaces manual register constants, bit masks, shifts, and the
hand-written GpuId parsing code with typed register and field accessors.
It also adds helpers for combining split 64-bit registers and uses the new
definitions in reset, L2 power-on, and GPU info readout/logging paths.
This reduces open-coded bit manipulation making the code easier to read
and maintain.
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Daniel Almeida <daniel.almeida@collabora.com>
Co-developed-by: Deborah Brouwer <deborah.brouwer@collabora.com>
Signed-off-by: Deborah Brouwer <deborah.brouwer@collabora.com>
Link: https://patch.msgid.link/20260409-b4-tyr-use-register-macro-v5-v5-1-8abfff8a0204@collabora.com
[aliceryhl: reformat long comment]
Signed-off-by: Alice Ryhl <aliceryhl@google.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions
