diff options
| author | Manikanta Maddireddy <mmaddireddy@nvidia.com> | 2026-03-25 00:37:53 +0530 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2026-04-08 17:00:23 -0500 |
| commit | 40805f32dceadebb7381d911003100bec7b8cd51 (patch) | |
| tree | 70441df1e31866078af08e17d681bddc94d25f31 /tools/perf/scripts/python | |
| parent | ea60ca067f0f098043610c96a915d162113c1aac (diff) | |
PCI: dwc: Apply ECRC workaround to DesignWare 5.00a as well
The ECRC (TLP digest) workaround was originally added for DesignWare
version 4.90a. Tegra234 SoC has 5.00a DWC HW version, which has the same
ATU TD override behaviour, so apply the workaround for 5.00a too.
Fixes: a54e19073718 ("PCI: tegra194: Add Tegra234 PCIe support")
Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Vidya Sagar <vidyas@nvidia.com>
Link: https://patch.msgid.link/20260324190755.1094879-13-mmaddireddy@nvidia.com
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions