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| author | Michael Chen <michael.chen@amd.com> | 2026-01-06 15:22:57 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2026-03-17 10:30:15 -0400 |
| commit | 370deb69ea618130c396ed4f33f035773c3d7420 (patch) | |
| tree | d515bd91571a3f21d683094d113b5a69e6958b73 /tools/perf/scripts/python/task-analyzer.py | |
| parent | 44e5195fa3d4f14cfef6fcec0ccc32a08bac1d87 (diff) | |
drm/amdgpu: Fix RRMT for gfx v12_1
Correct NORMALIZE_XCC_REG_OFFSET to 0xFFFF
because reg offset is in DW. Also set mode 3
temporarily for out of XCD access for MMHUB
TLB flush. Will need to figure out how to
differentiate between AID and MID access later.
Signed-off-by: Michael Chen <michael.chen@amd.com>
Reviewed-by: Alex Sierra <alex.sierra@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/task-analyzer.py')
0 files changed, 0 insertions, 0 deletions