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| author | Ravi Bangoria <ravi.bangoria@amd.com> | 2026-02-16 04:25:24 +0000 |
|---|---|---|
| committer | Peter Zijlstra <peterz@infradead.org> | 2026-02-27 16:40:24 +0100 |
| commit | f9d55ccf0199d1a80c2519084578f0c345dedd2f (patch) | |
| tree | 934726200de04cff5133ab7d4bb5a3102aefc227 /tools/perf/scripts/python/stackcollapse.py | |
| parent | 1b044ff3c17e9d7fd93ffc0ba541ccdeb992d7f5 (diff) | |
perf/amd/ibs: Define macro for ldlat mask and shift
Load latency filter threshold is encoded in config1[11:0]. Define a mask
for it instead of hardcoded 0xFFF. Unlike "config" fields whose layout
maps to PERF_{FETCH|OP}_CTL MSR, layout of "config1" is custom defined
so a new set of macros are needed for "config1" fields.
Signed-off-by: Ravi Bangoria <ravi.bangoria@amd.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Link: https://patch.msgid.link/20260216042530.1546-2-ravi.bangoria@amd.com
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions