diff options
| author | Shawn Lin <shawn.lin@rock-chips.com> | 2026-03-25 09:58:32 +0800 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2026-04-07 11:12:09 -0500 |
| commit | f3ddb8a9a97fd7b933442d25309b90eafc5f2d74 (patch) | |
| tree | 9739af2186559cb578249da915cfc7f663b88629 /tools/perf/scripts/python/stackcollapse.py | |
| parent | a3966a6f915ea7d1af0941ea26848d921e574c45 (diff) | |
PCI: dw-rockchip: Add pcie_ltssm_state_transition tracepoint support
Rockchip platforms provide a 64x4 bytes debug FIFO to trace the LTSSM
transition and data rate change history. These will be useful for debugging
issues such as link failure, etc.
Hence, expose these information over pcie_ltssm_state_transition
tracepoint.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
[mani: commit log]
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Reviewed-by: Steven Rostedt (Google) <rostedt@goodmis.org>
Link: https://patch.msgid.link/1774403912-210670-4-git-send-email-shawn.lin@rock-chips.com
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions