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authorChristophe Parant <c.parant@phytec.fr>2025-12-10 11:16:09 +0100
committerAlexandre Torgue <alexandre.torgue@foss.st.com>2026-03-06 10:39:36 +0100
commite4c9cc73887eab58368499dcab3c6b7dc04a3102 (patch)
treea15d0581a5f716458aedc24c0b28b4832fff678c /tools/perf/scripts/python/stackcollapse.py
parentd07f9c56d09fc686231cece73a1793427aaa4775 (diff)
ARM: dts: stm32: phycore-stm32mp15: Disable optional SoM peripherals
Following peripherals are optional on phyCORE-STM32MP15x following PHYTEC standard SoM variants: external RTC, EEPROM, SPI NOR. Also NAND (fmc) can be populated instead of eMMC (sdmmc2). So disable those peripherals on SoM dtsi file and enable them on board dts file. Additionally, enable by default the "DTS" SoC IP on common SoM dtsi file as it is not an optional IP in STM32MP15x SoC. Signed-off-by: Christophe Parant <c.parant@phytec.fr> Link: https://lore.kernel.org/r/20251210101611.27008-10-c.parant@phytec.fr Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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