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authorDeborah Brouwer <deborah.brouwer@collabora.com>2026-04-09 10:51:27 -0700
committerAlice Ryhl <aliceryhl@google.com>2026-04-27 18:43:05 +0000
commitbc8dd92ec67e87244b434304ee25eef0ff70da6e (patch)
tree2f6fe223989cca3051705d610d13a8e3ad365130 /tools/perf/scripts/python/stackcollapse.py
parent566eec206a61604f0b84a858b45265dbef2067e1 (diff)
drm/tyr: Use register! macro for MMU_CONTROL
Define the MMU_CONTROL register block with the kernel's register! macro and replace the existing hand-written MMU register definitions with typed register and field accessors. This adds typed definitions for the MMU IRQ registers and the per-address space MMU_AS_CONTROL registers, including TRANSTAB, MEMATTR, LOCKADDR, COMMAND, FAULTSTATUS, STATUS, and TRANSCFG. It also introduces typed enums for MMU commands, fault types, access types, address space modes, memory attributes, and related MMU configuration fields. For logical 64-bit MMU registers that are exposed as split 32-bit MMIO registers, define both the typed 64-bit view and explicit low/high 32-bit registers so the register layout remains documented without relying on native 64-bit MMIO accesses. This reduces open-coded bit manipulation, keeps MMU register layout knowledge in one place, and makes the definitions easier to read and maintain. Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Co-developed-by: Daniel Almeida <daniel.almeida@collabora.com> Signed-off-by: Daniel Almeida <daniel.almeida@collabora.com> Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com> Signed-off-by: Deborah Brouwer <deborah.brouwer@collabora.com> Link: https://patch.msgid.link/20260409-b4-tyr-use-register-macro-v5-v5-4-8abfff8a0204@collabora.com [aliceryhl: reformat long comment] Signed-off-by: Alice Ryhl <aliceryhl@google.com>
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