iio: adc: ad7192: fix GPOCON register access annotation

The comment next to AD7192_REG_GPOCON marks the register as RO,
but the AD7192 datasheet (Rev. A, page 24, GPOCON REGISTER) says:
"The GPOCON register is an 8-bit register from which data can be
read or to which data can be written."

The driver itself uses ad_sd_write_reg() against this register in
ad7192_show_scale() / write paths to control the bridge power-down
switch and digital outputs, which matches the RW datasheet
description. Update the comment to RW so it does not mislead
future readers.

Signed-off-by: Stepan Ionichev <sozdayvek@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>

0 files changed, 0 insertions, 0 deletions