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authorJason Gunthorpe <jgg@nvidia.com>2026-02-27 11:25:41 -0400
committerJoerg Roedel <joerg.roedel@amd.com>2026-03-17 13:14:24 +0100
commit7cd0c655f02f08a5de851059ac8360e5d10fae62 (patch)
tree50245d86dcd6289cbea3fcf7784a2235804c16f2 /tools/perf/scripts/python/stackcollapse.py
parentc70d20b25ca30d68b377b9363a2adca6eb2538e3 (diff)
iommu/riscv: Allow RISC_VIOMMU to COMPILE_TEST
This driver used to use a lot of page table constants from the architecture code which prevented COMPILE_TEST on other architectures. Now that iommupt provides all of the constants internally there are only two small bumps preventing COMPILE_TEST. - Use the generic functions for the riscv specific phys_to_pfn() and pfn_to_phys() - Use CONFIG_MMIOWB to block off the mmiowb() barrier - Require 64 bit because of writeq use failing compilation on 32 bit Tested-by: Vincent Chen <vincent.chen@sifive.com> Acked-by: Paul Walmsley <pjw@kernel.org> # arch/riscv Reviewed-by: Tomasz Jeznach <tjeznach@rivosinc.com> Tested-by: Tomasz Jeznach <tjeznach@rivosinc.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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