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authorBiju Das <biju.das.jz@bp.renesas.com>2026-04-08 09:54:14 +0100
committerMark Brown <broonie@kernel.org>2026-04-08 15:57:52 +0100
commit5277c291968d87c6a093f50ef489df9d52cb3ca9 (patch)
tree1114e4433cff315073c3710d5044c98beab3ac2e /tools/perf/scripts/python/stackcollapse.py
parent591cd656a1bf5ea94a222af5ef2ee76df029c1d2 (diff)
spi: dt-bindings: renesas,rzv2h-rspi: Document RZ/G3L SoC
Document RSPI IP found on the RZ/G3L SoC. The RSPI IP is compatible with the RZ/V2H RSPI IP, but has 2 clocks compared to 3 on RZ/V2H. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://patch.msgid.link/20260408085418.18770-2-biju.das.jz@bp.renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
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