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authorPengyu Luo <mitltlatltl@gmail.com>2026-03-08 14:48:35 +0800
committerBjorn Andersson <andersson@kernel.org>2026-03-30 08:41:00 -0500
commit2f4c5dea9a285cc24a80e9fef8d7014bffce967b (patch)
tree747bcdabbd488fcbb1f0bd97c5f57097356df66a /tools/perf/scripts/python/stackcollapse.py
parent7a4790b1a2c9ff66bd7a95d8761d5e9fc9334ba9 (diff)
arm64: dts: qcom: sc8280xp: Add dsi nodes on SC8280XP
The DT configuration follows other Samsung 5nm-based Qualcomm SOCs, utilizing the same register layouts and clock structures. However, DSI won't work properly for now until we submit dispcc fixes. And some DSC enabled panels require DPU timing calculation fixes too. (hdisplay / width timing round errors cause the fifo error) Co-developed-by: Tianyu Gao <gty0622@gmail.com> Signed-off-by: Tianyu Gao <gty0622@gmail.com> Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com> Tested-by: White Lewis <liu224806@gmail.com> # HUAWEI Gaokun3 Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260308064835.479356-5-mitltlatltl@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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