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authorGustavo Sousa <gustavo.sousa@intel.com>2026-03-09 21:42:08 -0300
committerGustavo Sousa <gustavo.sousa@intel.com>2026-03-10 19:18:45 -0300
commit19da26bce08a5686515b877099af78169148a3b3 (patch)
treec81aa824b490236705e48dc69937c756a7a5457b /tools/perf/scripts/python/stackcollapse.py
parentce517adff59c50a54a33ae90e2947eff9698dc86 (diff)
drm/xe/nvlp: Read platform-level stepping info
There will be a NVL-P workaround for which we will need to know the platform-level stepping information in order to decide whether to apply it or not. While NVL-P has a nice mapping between the PCI revid and our symbolic stepping enumeration, not all platforms are like that: (i) Some platforms will have a single PCI revid used for a set platform level steppings (ii) and some might even require specific mappings. To make things simpler, let's include stepping information in the device info only on demand, for those platforms where it is needed for workaround checks. v2: - Call xe_step_platform_get() very early, to allow device workarounds to use it in early stages of device initialization. (Matt) Bspec: 74201 Reviewed-by: Matt Roper <matthew.d.roper@intel.com> # v1 Link: https://patch.msgid.link/20260309-extra-nvl-p-enabling-patches-v5-3-be9c902ee34e@intel.com Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
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