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| author | Damon Ding <damon.ding@rock-chips.com> | 2025-11-11 10:21:03 +0800 |
|---|---|---|
| committer | Luca Ceresoli <luca.ceresoli@bootlin.com> | 2026-03-25 12:57:55 +0100 |
| commit | 05d09e7f28c8f6e39c54d79fd96643f6faf5dbee (patch) | |
| tree | 032211c84370e0bc1cd1c65ee006e94afca79586 /tools/perf/scripts/python/libxed.py | |
| parent | 78842c1e3b05c1d5b7b32a33ccbfd5fcccc5557d (diff) | |
drm/bridge: analogix_dp: Reuse &link_train.training_lane[] to set DPCD DP_TRAINING_LANEx_SET
In analogix_dp_link_start(), &link_train.training_lane[] is used to
set phy PE/VS configurations, and buf[] is initialized with the same
values to set DPCD DP_TRAINING_LANEx_SET.
It makes sense to reuse &link_train.training_lane[] to set DPCD
DP_TRAINING_LANEx_SET, which can remove the redundant assignments
and make codes more concise.
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Link: https://patch.msgid.link/20251111022103.1350183-1-damon.ding@rock-chips.com
Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Diffstat (limited to 'tools/perf/scripts/python/libxed.py')
0 files changed, 0 insertions, 0 deletions