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authorAndrea Righi <arighi@nvidia.com>2026-08-04 17:13:24 +0200
committerPeter Zijlstra <peterz@infradead.org>2026-08-07 18:27:09 +0200
commit293f9611ae73564febc553935830074f0f300694 (patch)
tree50684246cd30f427eefcd675b20398dc0d6af203 /tools/perf/scripts/python/bin
parent5186ef36909c792591fda7a1ae2afc168f60bc90 (diff)
sched/fair: Prefer fully idle cores for NOHZ balancing
find_new_ilb() selects the first idle housekeeping CPU without considering whether another thread is running on the same physical core. On an SMT system, the idle load balancer can therefore activate both siblings even when another housekeeping CPU has an entirely idle core. On most SMT systems, this is not problematic because the idle load balancer is a short-lived activity and the transient wakeup of a sibling has negligible performance impact. However, this can be particularly costly on NVIDIA Olympus cores used in Vera. Briefly activating an otherwise idle sibling can reduce the performance available to the other sibling and this effect does not necessarily end once the activated sibling becomes idle: after the ILB finishes and its CPU enters WFI, full single-thread performance is restored only after the sibling has remained idle for a qualification interval (10 Ki cycles on the tested Vera system). Repeated short sibling wakeups can therefore sustain the interference even with little actual overlap. Prevent this by preferring an idle housekeeping CPU whose entire SMT core is idle. Retain the first idle CPU as a fallback when no fully idle core is available, so NOHZ balancing continues to make forward progress. Once a partially busy core has been examined, skip its remaining SMT siblings to avoid repeating the core-idle check on wide SMT systems. Tests performed using an ad hoc GEMM benchmark running one CPU-intensive task per SMT core within its CPU affinity mask improved from approximately 6.2 TFLOP/s to 9.4 TFLOP/s. Note that this preference may wake a fully idle physical core instead of using an idle sibling of an active core, potentially increasing ILB wakeup latency or energy consumption on some architectures. It may also scan additional CPUs before selecting the one to run the ILB. The selection falls back to the first idle CPU when no fully idle SMT core is available. Non-SMT systems continue to select the first idle housekeeping CPU. Signed-off-by: Andrea Righi <arighi@nvidia.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Mete Durlu <meted@linux.ibm.com> Reviewed-by: Vincent Guittot <vincent.guittot@linaro.org> Link: https://patch.msgid.link/20260804151324.918020-1-arighi@nvidia.com
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