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authorWenmeng Liu <wenmeng.liu@oss.qualcomm.com>2026-03-13 18:13:03 +0800
committerBryan O'Donoghue <bod@kernel.org>2026-05-09 00:22:58 +0100
commit27c6817bbc0edfe11669d0185e7ae5dc7a113edb (patch)
treeac706dbcd7cc9fc17346f32797391c62a840e379 /tools/perf/scripts/python/bin
parent817998f863981b8b3f9829798dc4ec9fa275bdaf (diff)
media: qcom: camss: Fix csid clock configuration for sa8775p
Fix the mismatch between clock list and clock rate table for CSID lite instances. The current implementation has 5 clocks defined but only 2 are actually needed (vfe_lite_csid and vfe_lite_cphy_rx), while the clock rate table doesn't match this configuration. Update both clock list and rate table to maintain consistency: - Remove unused clocks: cpas_vfe_lite, vfe_lite_ahb, vfe_lite - Update clock rate table to match the remaining two clocks Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Fixes: ed03e99de0fa ("media: qcom: camss: Add support for CSID 690") Cc: stable@vger.kernel.org Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
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