diff options
| author | Shuming Fan <shumingf@realtek.com> | 2026-03-27 16:23:31 +0800 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2026-03-27 19:12:33 +0000 |
| commit | ae00200acb870ac00551350f26f03ced188bad6f (patch) | |
| tree | 66336dbc4879ed0b702fc21b3320d04e54769307 /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | 7caae0aed04137545e9f8c146d8d1dbb7a8e9865 (diff) | |
ASoC: SDCA: fix the register to ctl value conversion for Q7.8 format
The division calculation should be implemented using signed integer format.
This patch changes mc->shift from an unsigned type to a signed integer during the calculation.
Fixes: 501efdcb3b3a ("ASoC: SDCA: Pull the Q7.8 volume helpers out of soc-ops")
Signed-off-by: Shuming Fan <shumingf@realtek.com>
Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://patch.msgid.link/20260327082331.2277498-1-shumingf@realtek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions