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| author | Fudongwang <Fudong.Wang@amd.com> | 2024-09-14 09:33:44 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2024-10-07 14:10:29 -0400 |
| commit | 0e37e4b9afbd08df1f00a70bbb4d1ec273d18c9e (patch) | |
| tree | c72ce62c2f6ed6c3f8525f86970b86bccda46c6a /rust/zerocopy/src/pointer | |
| parent | 8cb028a1bbd960a1ff71b7300e557be9269f98fd (diff) | |
drm/amd/display: skip disable CRTC in seemless bootup case
Resync FIFO is a workaround to write the same value to
DENTIST_DISPCLK_CNTL register after programming OTG_PIXEL_RATE_DIV
register, in case seemless boot, there is no OTG_PIXEL_RATE_DIV register
update, so skip CRTC disable when resync FIFO to avoid random FIFO error
and garbage.
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Fudongwang <Fudong.Wang@amd.com>
Signed-off-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'rust/zerocopy/src/pointer')
0 files changed, 0 insertions, 0 deletions