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| author | Pranay Samala <pranay.samala@intel.com> | 2026-05-19 13:23:08 +0530 |
|---|---|---|
| committer | Suraj Kandpal <suraj.kandpal@intel.com> | 2026-05-22 15:13:20 +0530 |
| commit | f33862ec3e8849ad7c0a3dd46719083b13ade248 (patch) | |
| tree | 386b0a9580d8e3c380ac54416b393913b071e9a4 /rust/zerocopy/src/pointer/git@git.tavy.me:linux-stable.git | |
| parent | c987f8c20946d41b9f191fdd2d7601e65e8cc120 (diff) | |
drm/i915/color: Fix HDR pre-CSC LUT programming loop
The integer lut programming loop never executes completely due to
incorrect condition (i++ > 130).
Fix to properly program 129th+ entries for values > 1.0.
Cc: <stable@vger.kernel.org> #v6.19
Fixes: 82caa1c8813f ("drm/i915/color: Program Pre-CSC registers")
Signed-off-by: Pranay Samala <pranay.samala@intel.com>
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260519075308.383877-1-pranay.samala@intel.com
Diffstat (limited to 'rust/zerocopy/src/pointer/git@git.tavy.me:linux-stable.git')
0 files changed, 0 insertions, 0 deletions