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authorJohn Madieu <john.madieu.xa@bp.renesas.com>2026-05-25 11:02:17 +0000
committerMark Brown <broonie@kernel.org>2026-06-01 15:30:15 +0100
commit948b075ebc95ccce630765bb30f42ae774b20bfc (patch)
treeab231dcf75a05d3650ea336efdb1017700439283 /rust/zerocopy/src/pointer/git@git.tavy.me:linux-stable.git
parent22622faf8120f2a9887839691743dddb89989499 (diff)
ASoC: rsnd: Add RZ/G3E SoC probing and register map
RZ/G3E audio subsystem has a different register layout compared to R-Car Gen2/Gen3/Gen4, as described below: - Different base address organization (SCU, ADG, SSIU, SSI as separate regions accessed by name) - Additional registers: AUDIO_CLK_SEL3, SSI_MODE3, SSI_CONTROL2 - Different register offsets within each region Add RZ/G3E SoC's audio subsystem register layouts and probe support. Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://patch.msgid.link/20260525110230.4014435-6-john.madieu.xa@bp.renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'rust/zerocopy/src/pointer/git@git.tavy.me:linux-stable.git')
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