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authorBiju Das <biju.das.jz@bp.renesas.com>2026-05-19 15:15:13 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2026-05-22 10:24:32 +0200
commit6549ef9cc236cd09d42ae521e459817ae6b5c5fa (patch)
treee53052da861d64a3fe425e38c4972ff05f5d3885 /rust/zerocopy/src/pointer/git@git.tavy.me:linux-stable.git
parent4f42053949324867dc40d67829f18a01539e6322 (diff)
clk: renesas: rzg2l: Simplify SAM PLL configuration macro
Replace the PLL146_CONF() macro and its associated CPG_SAMPLL_CLK{1,2}(n) helpers with a single CPG_SAM_PLL_CONF(stby) macro that takes the PLL standby register offset directly. This removes the implicit coupling between PLL index n and register layout and eliminates the now-redundant GET_REG_SAMPLL_CLK2() macro. The RZ/V2M PLL4 definition is also updated to use the new macro with its explicit standby offset (0x100), removing the local PLL4_CONF define. No functional changes. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://patch.msgid.link/20260519141518.389670-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'rust/zerocopy/src/pointer/git@git.tavy.me:linux-stable.git')
0 files changed, 0 insertions, 0 deletions