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authorCosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>2026-04-10 19:35:21 +0300
committerGeert Uytterhoeven <geert+renesas@glider.be>2026-04-27 11:42:09 +0200
commit38acb2a1a0ced15f61342347bba8aa57775802ea (patch)
treed485bec89598c90cf5210b132b1e2e2d368b1d57 /rust/zerocopy/src/pointer/git@git.tavy.me:linux-stable.git
parentf34ad4b0b4678d20697f93a79f013d0b6b1d7136 (diff)
clk: renesas: r9a09g077: Add MTU3 module clock
The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs have a MTU3 block connected to the PCLKH and with a module clock controlled by register 0x308, bit 0. Add support for the module clock. Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260410163530.383818-2-cosmin-gabriel.tanislav.xa@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'rust/zerocopy/src/pointer/git@git.tavy.me:linux-stable.git')
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